AN7397K, AN7397S
■ Electrical Characteristics at VCC = 5 V, f = 1 kHz, Ta = 25°C ± 2°C
Parameter
Symbol
Conditions
Min Typ Max Unit
Total circuit current
Maximum output voltage *3
Output noise voltage 1 *1, 4
Voltage gain 1 *3
Total harmonic distortion 1 *2, 3
Output noise voltage 2 *1, 5
Voltage gain 2 *6
Total harmonic distortion 2 *2, 6
I2C interface
ITOTAL
VOUT1
VNO1
GV1
THD1
VNO2
GV2
THD2
VIN = 0 mV
L-in, R-in THD = 1%
L-out, R-out RG = 4.7 kΩ
L-out, R-out VIN = 400 mV
L-out, R-out VIN = 400 mV
S-out RG = 4.7 kΩ
S-out VIN = 60 mV
S-out VIN = 60 mV
18 25 32 mA
0.8 1.0 V[rms]
20 50 µV[rms]
−2 0
2
dB
0.05 0.2
%
80 200 µV[rms]
343 450 685 mV[rms]
0.15 0.3
%
Sink current at ACK
IACK Maximum value of sink current of 2.0 10 mA
pin 11 at ACK
SCL/SDA signal input high- level VIHI
SCL/SDA signal input low- level VILO
Input-enable maximum frequency fImax
2.5 3.5
V
0 0.5
V
100 Kbit/s
Note) *1: In measuring, the filter with A-characteristic curve is used.
*2: In measuring, the filter for the range of 15 Hz to 30 kHz (12 dB/OCT) is used.
*3: Mode: ST, L-in + R-in, VCA (I2C data: BFH)
*4: Mode: ST, VCA (I2C data: BFH)
*5: Mode: ST, VCA (I2C data: 80 H)
*6: Mode: ST, VCA (I2C data: 80 H) for either L-in or R-in
• Design reference data
Parameter
I2C interface
Bus free before start
Start condition set-up time
Start condition hold time
SCL/SDA low period
SCL high period
SCL/SDA rise time
SCL/SDA fall time
Data set-up time (Write)
Data hold time (Write)
Acknowledge set-up time
Acknowledge hold time
Stop condition set-up time
DAC
6-bit DAC DNLE
Symbol
Conditions
Min Typ Max Unit
tBUF
tSU, STA
tHD, STA
tLO
tHI
tR
tF
tSU, DAT
tHD, DAT
tSU, ACK
tHD, ACK
tSU, STO
4.0
µs
4.0
µs
4.0
µs
4.0
µs
4.0
µs
1.0 µs
0.35 µs
0.25
µs
0
µs
3.5 µs
0
µs
4.0
µs
L6 1 LSB = (Data (max.) − Data (00))/63 0.1 1.0 1.9 LSB
step
SDC00027BEB
3