AN726 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
AN726 Datasheet PDF : 28 Pages
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5.8. Play/Record Flash Mode
In play/record flash mode, the system samples and outputs data at 9.6 kHz.
Class-D RD Board
R
SiM3U1xx
Flash
SARADC0
MIC
EPCA
AN726
L
Figure 16. Play/Record Flash Mode Block Diagram
For playing, the firmware reads the compressed data from the flash, decompresses the data using µLaw, performs
the EWMA algorithm, quantizes the data to 9 bits, and outputs the PWM waveform on the EPCA0 module. The
remainder-weighted dithering algorithm is not used at all in this mode since the data LSBs will often be 0’s from the
compression algorithm.
For recording, the firmware measures the microphone (MK1) using one SARADC module, compresses the data
using µLaw, and stores the data in flash.
Figure 17 shows the data flow for the play/record flash mode.
R
SiM3U1xx
Flash
µLaw
decompression 8
bits to 14 (signed)
9-bit
quantization
EPCA
µLaw compression
14 bits to 8 (signed)
12-bit
quantization
EWMA
L
hardware
gain stage
MIC
SARADC0
convert from 12
bits unsigned to
14 signed
Figure 17. Play/Record Flash Mode Flow Diagram
Rev. 0.1
15
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