PIC14000 View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC14000 Datasheet PDF : 153 Pages
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PIC14000
TABLE 3-1:
Pin Name
CDAC
RA0/AN0
RA1/AN1
RA2/AN2
RA3/AN3
SUM
RC0/REFA
RC1/CMPA
RC2
RC3/T0CKI
RC4
RC5
RC6/SCLA
RC7/SDAA
RD0/SCLB
RD1/SDAB
RD2/CMPB
PIN DESCRIPTIONS
Pin
No.
I/O
Pin Type
Input Output
Description
22
O
—
AN
A/D ramp current source output. Normally connected to
external capacitor to generate a linear voltage ramp.
2
I/O AN/ST
CMOS Analog input channel 0. This pin can also serve as a
general-purpose I/O.
1
I/O AN/ST
CMOS Analog input channel 1. This pin can connect to a level
shift network. If enabled, a +0.5V offset is added to the
input voltage. This pin can also serve as a general-
purpose I/O.
28
I/O AN/ST
CMOS Analog input channel 2. This pin can also serve as a
general purpose digital I/O.
27
I/O AN/ST
CMOS Analog input channel 3. This pin can also serve as a gen-
eral purpose digital I/O.
21
O
—
AN
AN1 summing junction output. This pin can be connected
to an external capacitor for averaging small duration
pulses.
19 I/O-PU ST
CMOS
LED direct-drive output or programmable reference A out-
put. This pin can also serve as a GPIO. If enabled, this
pin has a weak internal pull-up to VDD.
18 I/O-PU ST
CMOS
LED direct-drive output or comparator A output. This pin
can also serve as a GPIO. If enabled, this pin has a weak
internal pull-up to VDD.
17 I/O-PU ST
CMOS
LED direct-drive output. This pin can also serve as a
GPIO. If enabled, this pin has a weak internal pull-up to
VDD
16 I/O-PU ST
CMOS
LED direct-drive output. This pin can also serve as a
GPIO, or an external clock input for Timer0. If enabled,
this pin has a weak internal pull-up to VDD.
15 I/O-PU ST
CMOS
LED direct-drive output. This pin can also serve as a
GPIO. If enabled, a change on this pin can cause a CPU
interrupt. If enabled, this pin has a weak internal pull-up
to VDD.
13 I/O-PU ST
CMOS
LED direct-drive output. This pin can also serve as a
GPIO. If enabled, a change on this pin can cause a CPU
interrupt. If enabled, this pin has a weak internal pull-up
to VDD.
12
I/O ST/SM NPU/OD General purpose I/O. If enabled, is multiplexed as
(No P-diode) synchronous serial clock for I2C interface. Also is the
serial programming clock. If enabled, a change on this pin
can cause a CPU interrupt. This pin has an N-channel
pull-up device which is disabled in I2C mode.
11
I/O ST/SM NPU/OD General purpose I/O. If enabled, is multiplexed as
(No P-diode) synchronous serial data I/O for I2C interface. Also is the
serial programming data line. If enabled, a change on this
pin can cause a CPU interrupt. This pin has an N-channel
pull-up device which is disabled in I2C mode.
6
I/O ST/SM NPU/OD General purpose I/O. If enabled, is multiplexed as
(No P-diode) synchronous serial clock for I2C interface. This pin has an
N-channel pull-up device which is disabled in I2C mode.
5
I/O ST/SM NPU/OD General purpose I/O. If enabled, is multiplexed as
(No P-diode) synchronous serial data I/O for I2C interface. This pin has
an N-channel pull-up device which is disabled in I2C
mode.
4 I/O-PU AN/ST CMOS
General purpose I/O or comparator B output.
© 1996 Microchip Technology Inc.
Preliminary
DS40122B-page 9
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