APA300(2008) View Datasheet(PDF) - Actel Corporation
Part Name
Description
Manufacturer
APA300 Datasheet PDF : 174 Pages
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ProASICPLUS Flash Family FPGAs
Previous version Changes in current version (v5.7)
Page
Advanced v0.6
The "Synchronous Write and Read to the Same Location" section was updated.
page 1-61
(continued)
The "Asynchronous Write and Synchronous Read to the Same Location" section was updated. page 1-62
The "Asynchronous FIFO Read" section was updated.
page 1-67
The "Pin Description" section has been updated.
page 1-73
The "Recommended Design Practice for VPN/VPP" section is new.
page 1-74
The "100-Pin TQFP" section is new.
page 2-1
The "484-Pin FBGA" section is new.
page 2-45
Advanced v0.5
Advanced v0.4
The description for the VPN pin has changed.
The "Plastic Device Resources" section has been updated.
page 1-74
page i-ii
Figure 1-12 and Figure 1-13 have been updated.
page 1-14
The "Tristate Buffer Delays" section has been updated.
page 1-42
The "Output Buffer Delays" section has been updated.
page 1-44
The "Input Buffer Delays" section has been updated.
page 1-46
The "Global Input Buffer Delays" section has been updated.
page 1-48
The "456-Pin PBGA" section has been updated.
page 2-22
Advanced v0.3
The "676-Pin FBGA" section has been updated.
The "ProASICPLUS Product Profile" section has been changed.
page 2-51
page i-i
The "Plastic Device Resources" section has been updated.
page i-ii
The "ProASICPLUS I/O Power Supply Voltages" sectionhas been updated.
page 1-9
WDATA has ben changed to DI, and RDATA has been changed to DO to make them consistent
with the signal names found in the Macro Library Guide.
Figure 1-21 and Figure 1-22 have been updated.
page 1-24
and page 1-25
The "Design Environment" section and Figure 1-26 have been updated.
page 1-27
and page 1-42
The table in the "Package Thermal Characteristics" section has been updated.
page 1-29
The "Calculating Typical Power Dissipation" section is new.
page 1-30
The "Programming, Storage, and Operating Limits" section is new.
page 1-33
The ’Nominal Supply Voltages’ section has been updated.
page 1-34
The "DC Electrical Specifications (VDDP = 2.5 V ±0.2V)" section was updated.
page 1-36
The "DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V)" section was page 1-38
updated.
The "Recommended Operating Conditions" section was updated.
page 1-35
The "ProASICPLUS Clock Management System" section was updated.
page 1-13
Figure 1-14 was updated.
page 1-14
Advanced v0.3
Figure 1-13 is new.
page 1-12
(continued)
Tables 5, 6, and 7 from Advanced v0.3 were removed.
The "Memory Block SRAM Interface Signals" section was updated.
page 1-24
The "Memory Block FIFO Interface Signals" section was updated.
page 1-25
All pinout tables have been updated, and several packages are new:
208-Pin PQFP – APA150, APA300, APA450, APA600
456-Pin PBGA – APA150, APA300, APA450, APA600
144-Pin FBGA – APA150, APA300, APA450
256-Pin FBGA – APA150, APA300, APA450, APA600
676-Pin FBGA – APA600
Advanced v0.1
Figure 1-23 has been updated.
page 1-26
v5.7
3-7
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