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HYB3117805BJ-60 View Datasheet(PDF) - Siemens AG

Part Name
Description
Manufacturer
HYB3117805BJ-60 Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2M x 8 - Bit Dynamic RAM
2k Refresh
(Hyper Page Mode- EDO)
HYB3117805BSJ -50/-60/-70
Advanced Information
2 097 152 words by 8-bit organization
0 to 70 °C operating temperature
Performance:
tRAC
tCAC
tAA
tRC
tHPC
RAS access time
CAS access time
Access time from address
Read/Write cycle time
Hyper page mode (EDO)
cycle time
-50 -60 -70
50 60 70 ns
13 15 20 ns
25 30 35 ns
84 104 124 ns
20 25 30 ns
Single + 3.3 V (± 0.3 V) supply
Low power dissipation
max. 432 mW active (-50 version)
max. 396 mW active (-60 version)
max. 360 mW active (-70 version)
7.2 mW standby (LV-TTL)
3.6 mW standby (CMOS)
Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh,
self refresh and test mode
Hyper page mode (EDO) capability
All inputs, outputs and clocks fully TTL-compatible
2048 refresh cycles / 32 ms (2k-Refresh)
Plastic Package:
P-SOJ-28-3 400 mil
Semiconductor Group
1
1.96

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