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AS5043ASST View Datasheet(PDF) - austriamicrosystems AG

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AS5043ASST Datasheet PDF : 37 Pages
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AS5043
Data Sheet – 3.3V / 5V Operation
7 3.3V / 5V Operation
The AS5043 operates either at 3.3V ±10% or at 5V ±10%. This is made possible by an internal 3.3V Low-Dropout (LDO)
Voltage regulator. The core supply voltage is always taken from the LDO output, as the internal blocks are always
operating at 3.3V.
For 3.3V operation, the LDO must be bypassed by connecting VDD3V3 with VDD5V (see Figure 4 ).
For 5V operation, the 5V supply is connected to pin VDD5V, while VDD3V3 (LDO output) must be buffered by a 1...10µF
capacitor, which should be placed close to the supply pin.
The VDD3V3 output is intended for internal use only. It should not be loaded with an external load.
The voltage levels of the digital interface I/O’s correspond to the voltage at pin VDD5V, as the I/O buffers are supplied
from this pin (see Figure 4).
Figure 4: Connections for 5V / 3.3V Supply Voltages
ms AGtent still valid A buffer capacitor of 100nF is recommended in both cases close to pin VDD5V. Note that pin VDD3V3 must always be
buffered by a capacitor. It must not be left floating, as this may cause an instable internal 3.3V supply voltage which may
Technicaal con lead to larger than normal jitter of the measured angle.
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Revision 1.80
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