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AS7C33256PFS18B View Datasheet(PDF) - Alliance Semiconductor

Part Name
Description
Manufacturer
AS7C33256PFS18B
ALSC
Alliance Semiconductor ALSC
AS7C33256PFS18B Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AS7C33256PFS18B
®
Write enable truth table (per byte)
Function
GWE BWE BWa BWb
Write All Bytes
L
X
X
X
H
L
L
L
Write Byte a
H
L
L
H
Write Byte b
H
L
H
L
Read
H
H
X
X
H
L
H
H
Key: X = don’t care, L = low, H = high, n = a, b; BWE, BWn = internal write signal.
Asynchronous Truth Table
Operation
Snooze mode
Read
Write
Deselected
ZZ
OE
I/O Status
H
X
High-Z
L
L
Dout
L
H
High-Z
L
X
Din, High-Z
L
X
High-Z
Notes:
1. X means “Don’t Careâ€
2. ZZ pin is pulled down internally
3. For write cycles that follows read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur.
4. Snooze mode means power down state of which stand-by current does not depend on cycle times
5. Deselected means power down state of which stand-by current depends on cycle times
Burst sequence table
Interleaved burst address (LBO = 1)
A1 A0 A1 A0 A1 A0
1st Address
00
01
10
2nd Address
01
00
11
3rd Address
10
11
00
4th Address
11
10
01
A1 A0
11
10
01
00
Linear burst address (LBO = 0)
A1 A0 A1 A0 A1 A0
1st Address
00
01
10
2nd Address
01
10
11
3rd Address
10
11
00
4th Address
11
10
01
A1 A0
11
00
01
10
12/10/04; v.1.7
Alliance Semiconductor
P. 6 of 19

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