AS7C34098A View Datasheet(PDF) - Alliance Semiconductor

Part Name

Description

Manufacturer

AS7C34098A

3.3 V 256 K × 16 CMOS SRAM

Alliance Semiconductor 

AS7C34098A

®

Read waveform 2 (CE, OE, UB, LB controlled)6,8,9

tRC

Address

OE

tOLZ

tAA

tOE

CE

tACE

tCLZ

LB, UB

DataOUT

tBA

tBLZ

tOHZ

tOH

Data valid

tCHZ

tBHZ

Write cycle (over the operating range)10

–10

Parameter

Symbol Min Max

Write cycle time

tWC 10

–

Chip enable (CE) to write end

tCW

7

–

Address setup to write end

tAW

7

–

Address setup time

tAS

0

–

Write pulse width (OE = High)

tWP1

7

–

Write pulse width (OE = Low)

tWP2 10

–

Write recovery time

tWR

0

–

Address hold from end of write

tAH

0

–

Data valid to write end

tDW

5

–

Data hold time

tDH

0

–

Write enable to output in High-Z tWZ 0

5

Output active from write end

tOW

3

–

Byte enable Low to write end

tBW

7

–

–12

Min Max

12 –

8–

8–

0–

8–

12 –

0

–

0

–

6

0

–

0

6

3

–

8

–

–15

Min Max

15 –

10 –

10 –

0

–

10 –

15 –

0

–

0

–

7

–

0

–

0

7

3

–

10 –

–20

Min Max

20 –

12 –

12 –

0

–

12 –

20 –

0

–

0

–

9

–

0

–

0

9

3

–

12 –

Unit Note

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns 4, 5

ns 4, 5

ns 4, 5

ns 4, 5

8/17/04,v. 2.1

Alliance Semiconductor

P. 5 of 10

Share Link: