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AT24C512B-10PU-1.8 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
AT24C512B-10PU-1.8
Atmel
Atmel Corporation Atmel
AT24C512B-10PU-1.8 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Features
Low-voltage and Standard-voltage Operation
– 1.8 (VCC = 1.8V to 3.6V)
Internally Organized 65,536 x 8
Two-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (3.6V), 400 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
128-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Max)
High Reliability
– Endurance: 1,000,000 Write Cycles
– Data Retention: 40 Years
Lead-free/Halogen-free Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP,
8-lead LAP and 8-lead SAP Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Die
Description
The AT24C512B provides 524,288 bits of serial electrically erasable and programma-
ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The
device’s cascadable feature allows up to four devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available in
space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array
(LAP), and 8-lead SAP packages. In addition, the entire family is available in a 1.8V
(1.8V to 3.6V) version.
Two-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512B
with Three Device
Address Inputs
Preliminary
Table 1. Pin Configurations
Pin Name Function
A0–A2
Address Inputs
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
NC
No Connect
8-lead TSSOP
8-lead PDIP
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
8-lead SOIC
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
8-lead Leadless Array
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead SAP
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
Rev. 5112A–SEEPR–8/05
1

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