AT25DF321A View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT25DF321A Datasheet PDF : 51 Pages
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Atmel AT25DF321A
While the device is programming, the Status Register can be read and will indicate that the device is busy. For faster
throughput, it is recommended that the Status Register be polled rather than waiting the tBP or tPP time to determine if the
data bytes have finished programming. At some point before the program cycle completes, the WEL bit in the Status
Register will be reset back to the logical “0” state.
The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to program
properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register.
Figure 8-1. Byte Program
CS
SCK
SI
0 1 2 3 4 5 6 7 8 9 10 11 12
29 30 31 32 33 34 35 36 37 38 39
OPCODE
ADDRESS BITS A23-A0
DATA IN
0 0 0 0 0 0 1 0AAAAAA
MSB
MSB
AAADDDDDDDD
MSB
SO
HIGH-IMPEDANCE
Figure 8-2. Page Program
CS
SCK
SI
0123456789
29 30 31 32 33 34 35 36 37 38 39
OPCODE
ADDRESS BITS A23-A0
DATA IN BYTE 1
0 0 0 0 0 0 1 0AAA
MSB
MSB
AAADDDDDDDD
MSB
DATA IN BYTE n
DDDDDDDD
MSB
SO
HIGH-IMPEDANCE
8.2 Dual-Input Byte/Page Program
The Dual-Input Byte/Page Program command is similar to the standard Byte/Page Program command and can be used to
program anywhere from a single byte of data up to 256-bytes of data into previously erased memory locations. Unlike the
standard Byte/Page Program command, however, the Dual-Input Byte/Page Program command allows two bits of data to
be clocked into the device on every clock cycle rather than just one.
Before the Dual-Input Byte/Page Program command can be started, the Write Enable command must have been
previously issued to the device (see “Write Enable” on page 18) to set the Write Enable Latch (WEL) bit of the Status
Register to a logical “1” state. To perform a Dual-Input Byte/Page Program command, an opcode of A2h must be clocked
into the device followed by the three address bytes denoting the first byte location of the memory array to begin
programming at. After the address bytes have been clocked in, data can then be clocked into the device two bits at a time
on both the SOI and SI pins.
The data is always input with the MSB of a byte first, and the MSB is always input on the SOI pin. During the first clock
cycle, bit 7 of the first data byte would be input on the SOI pin while bit 6 of the same data byte would be input on the SI
pin. During the next clock cycle, bits 5 and 4 of the first data byte would be input on the SOI and SI pins, respectively. The
sequence would continue with each byte of data being input after every four clock cycles. Like the standard Byte/Page
Program command, all data clocked into the device is stored in an internal buffer.
11
3686D–DFLASH–12/09
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