AT25DF641A View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT25DF641A

64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory

Atmel Corporation 

3. Block Diagram

Figure 3-1. Block Diagram

CS

SCK

SI (SIO)

SO (SOI)

WP

HOLD

INTERFACE

CONTROL

AND

LOGIC

Atmel AT25DF641A [Preliminary]

CONTROL AND

PROTECTION LOGIC

Y-DECODER

X-DECODER

I/O BUFFERS

AND LATCHES

SRAM

DATA BUFFER

Y-GATING

FLASH

MEMORY

ARRAY

4. Memory Array

To provide the greatest flexibility, the memory array of the Atmel® AT25DF641A can be erased

in four levels of granularity including a full chip erase. In addition, the array has been divided into

physical sectors of uniform size, of which each sector can be individually protected from pro-

gram and erase operations. The size of the physical sectors is optimized for both code and data

storage applications, allowing both code and data segments to reside in their own isolated

regions. The Memory Architecture Diagram illustrates the breakdown of each erase level as well

as the breakdown of each physical sector.

5

8693A–DFLASH–8/10

Share Link: