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AT26DF321 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
AT26DF321 Datasheet PDF : 34 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Figure 2-1. 8-SOIC Top View
CS 1
SO 2
WP 3
GND 4
8 VCC
7 NC
6 SCK
5 SI
3. Block Diagram
AT26DF321
Figure 2-2. 16-SOIC Top View
NC 1
VCC 2
NC 3
NC 4
NC 5
NC 6
CS 7
SO 8
16 SCK
15 SI
14 NC
13 NC
12 NC
11 NC
10 GND
9 WP
CONTROL AND
CS
PROTECTION LOGIC
SCK
SI
SO
INTERFACE
CONTROL
AND
LOGIC
Y-DECODER
WP
X-DECODER
I/O BUFFERS
AND LATCHES
SRAM
DATA BUFFER
Y-GATING
FLASH
MEMORY
ARRAY
4. Memory Array
To provide the greatest flexibility, the memory array of the AT26DF321 can be erased in four lev-
els of granularity including a full chip erase. In addition, the array has been divided into physical
sectors of uniform size, of which each sector can be individually protected from program and
erase operations. The size of the physical sectors is optimized for both code and data storage
applications, allowing both code and data segments to reside in their own isolated
regions. Figure 4-1 on page 4 illustrates the breakdown of each erase level as well as the break-
down of each physical sector.
3
3633F–DFLASH–5/7/08

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