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AT29LV1024 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
AT29LV1024 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
AT29LV1024
Device Operation (Continued)
ration of tWC, a read operation will effectively be a polling
operation.
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT29LV1024
in the following ways: (a) VCC sense— if VCC is below 1.8V
(typical), the program function is inhibited. (b) VCC power
on delay— once VCC has reached the VCC sense level,
the device will automatically time out 10 ms (typical) be-
fore programming. (c) Program inhibit— holding any one
of OE low, CE high or WE high inhibits program cycles. (d)
Noise filter— pulses of less than 15 ns (typical) on the WE
or CE inputs will not initiate a program cycle.
INPUT LEVELS: While operating with a 3.3V ±10%
power supply, the address inputs and control inputs (OE,
CE and WE) may be driven from 0 to 5.5V without ad-
versely affecting the operation of the device. The I/O lines
can be driven from 0 to 3.6V.
PRODUCT IDENTIFICATION: The product identifica-
tion mode identifies the device and manufacturer as At-
mel. It may be accessed by hardware or software opera-
tion. The hardware operation mode can be used by an ex-
ternal programmer to identify the correct programming al-
gorithm for the Atmel product. In addition, users may wish
to use the software product identification mode to identify
the part (i.e. using the device code), and have the system
software use the appropriate sector size for program op-
erations. In this manner, the user can have a common
board design for various Flash densities and, with each
density’s sector size in a memory map, have the system
software apply the appropriate sector size.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT29LV1024 features DATA
polling to indicate the end of a program cycle. During a
program cycle an attempted read of the last word loaded
will result in the complement of the loaded data on I/O7
and I/O15. Once the program cycle has been completed,
true data is valid on all outputs and the next cycle may
begin. DATA polling may begin at any time during the pro-
gram cycle.
TOGGLE BIT: I n a d d i t i o n t o DATA p o l l i n g t h e
AT29LV1024 provides another method for determining
the end of a program or erase cycle. During a program or
erase operation, successive attempts to read data from
the device will result in I/O6 and I/O14 toggling between
one and zero. Once the program cycle has completed,
I/O6 and I/O14 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time dur-
ing a program cycle.
OPTIONAL CHIP ERASE MODE: The entire device
can be erased by using a 6-byte software code. Please
see Software Chip Erase application note for details.
Absolute Maximum Ratings*
Temperature Under Bias................. -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to VCC + 0.6V
Voltage on OE
with Respect to Ground ................... -0.6V to +13.5V
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
4-65

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