AT49F2048A-70RC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT49F2048A-70RC Datasheet PDF : 13 Pages
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cycle, an attempted read of the last byte loaded will result
in the complement of the loaded data on I/O7. Once the
program cycle has been completed, true data is valid on all
outputs and the next cycle may begin. During a chip or sec-
tor erase operation, an attempt to read the device will give
a “0” on I/O7. Once the program or erase cycle has com-
pleted, true data will be read from the device. Data Polling
may begin at any time during the program cycle.
TOGGLE BIT: In addition to Data Polling, the AT49F2048A
provides another method for determining the end of a pro-
gram or erase cycle. During a program or erase operation,
successive attempts to read data from the device will result
in I/O6 toggling between one and zero. Once the program
cycle has completed, I/O6 will stop toggling and valid data
will be read. Examining the toggle bit may begin at any time
during a program cycle.
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT49F2048A in
the following ways: (a) VCC sense: if VCC is below 3.8V (typ-
ical), the program function is inhibited. (b) VCC power-on
delay: once VCC has reached the VCC sense level, the
device will automatically time-out 10 ms (typical) before
programming. (c) Program inhibit: holding any one of OE
low, CE high or WE high inhibits program cycles. (d) Noise
filter: pulses of less than 15 ns (typical) on the WE or CE
inputs will not initiate a program cycle.
Command Definition (in Hex)(1)
Command
Sequence
Bus
Cycles
1st Bus
Cycle
Addr Data
2nd Bus
Cycle
Addr Data
3rd Bus
Cycle
Addr Data
4th Bus
Cycle
Addr Data
5th Bus
Cycle
Addr Data
Read
Chip Erase
1
Addr
DOUT
6
5555
AA
2AAA
55
5555
80
5555
AA
2AAA
55
Sector Erase
6
5555
AA
2AAA
55
5555
80
5555
AA
2AAA
55
Word Program
Boot Block
Lockout(2)
4
5555
AA
2AAA
55
5555
A0
Addr
DIN
6
5555
AA
2AAA
55
5555
80
5555
AA
2AAA
55
Product ID Entry
3
5555
AA
2AAA
55
5555
90
Product ID Exit(3)
3
5555
AA
2AAA
55
5555
F0
Product ID Exit(3)
1
xxxx
F0
Notes:
1. The DATA FORMAT in each bus cycle is as follows: I/O15 - I/O8 (Don't Care); I/O7 - I/O0 (Hex).
The ADDRESS FORMAT in each bus cycle is as follows: A15 - A0 (Hex), A-1 and A15 - A16 (Don’t Care).
2. The 8K word boot sector has the address range 00000H to 01FFFH.
3. Either one of the Product ID Exit commands can be used.
4. SA = sector addresses: (A16-A0)
SA = 01XXX for BOOT BLOCK
SA = 02XXX for PARAMETER BLOCK 1
SA = 03XXX for PARAMETER BLOCK 2
SA = 1FXXX for MAIN MEMORY ARRAY
6th Bus
Cycle
Addr
Data
5555
10
SA(4)
30
5555
40
Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
Voltage on OE
with Respect to Ground ...................................-0.6V to +13.5V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
4 AT49F2048A
1159F–04/01
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