AT89C51RC View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT89C51RC

8-bit Microcontroller with 32K Bytes Flash

Atmel Corporation 

AT89C51RC

Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-

mented on the chip. Read accesses to these addresses will in general return random data, and

write accesses will have an indeterminate effect.

User software should not write 1s to these unlisted locations, since they may be used in future

products to invoke new features. In that case, the reset or inactive values of the new bits will

always be 0.

Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in Table 5-

2) and T2MOD (shown in Table 13-1 and Table 5-4) for Timer 2. The register pair (RCAP2H,

RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-

reload mode.

Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can

be set for each of the six interrupt sources in the IP register.

Dual Data Pointer Registers: To facilitate accessing both internal and external data memory,

two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-

83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1.

The user should always initialize the DPS bit to the appropriate value before accessing the

respective Data Pointer Register.

Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF

is set to “1” during power up. It can be set and reset under software control and is not affected by

reset.

7

1920C–MICRO–03/05

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