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AT89LS52(2001) View Datasheet(PDF) - Atmel Corporation

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AT89LS52 Datasheet PDF : 39 Pages
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AT89LS52
Timer 0 and 1
Timer 2
Capture Mode
Timer 0 and Timer 1 in the AT89LS52 operate the same way as Timer 0 and Timer 1 in the
AT89C51 and AT89C52. For further information on the timers’ operation, refer to the ATMEL
Web site (http://www.atmel.com). From the home page, select ‘Products’, then ‘8051-Architec-
ture Flash Microcontroller’, then ‘Product Overview’.
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The
type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has
three operating modes: capture, auto-reload (up or down counting), and baud rate generator.
The modes are selected by bits in T2CON, as shown in Table . Timer 2 consists of two 8-bit
registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine
cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the
oscillator frequency.
Table 5. Timer 2 Operating Modes
RCLK +TCLK
CP/RL2
0
0
0
1
1
X
X
X
TR2
MODE
1
16-bit Auto-reload
1
16-bit Capture
1
Baud Rate Generator
0
(Off)
In the Counter function, the register is incremented in response to a 1-to-0 transition at its cor-
responding external input pin, T2. In this function, the external input is sampled during S5P2 of
every machine cycle. When the samples show a high in one cycle and a low in the next cycle,
the count is incremented. The new count value appears in the register during S3P1 of the
cycle following the one in which the transition was detected. Since two machine cycles (24
oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24
of the oscillator frequency. To ensure that a given level is sampled at least once before it
changes, the level should be held for at least one full machine cycle.
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2
is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be
used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-
0 transition at external input T2EX also causes the current value in TH2 and TL2 to be cap-
tured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit
EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt. The capture
mode is illustrated in Figure 1.
11
2601A–12/01

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