AT89S51-24 View Datasheet(PDF) - Atmel Corporation
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Description
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AT89S51-24 Datasheet PDF : 32 Pages
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10. Interrupts
AT89S51
The AT89S51 has a total of five interrupt vectors: two external interrupts (INT0 and INT1), two
timer interrupts (Timers 0 and 1), and the serial port interrupt. These interrupts are all shown in
Figure 10-1.
Each of these interrupt sources can be individually enabled or disabled by setting or clearing a
bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once.
Note that Table 10-1 shows that bit positions IE.6 and IE.5 are unimplemented. User software
should not write 1s to these bit positions, since they may be used in future AT89 products.
The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers
overflow. The values are then polled by the circuitry in the next cycle.
Table 10-1. Interrupt Enable (IE) Register
(MSB)
(LSB)
EA
–
–
ES
ET1
EX1
ET0
EX0
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables the interrupt.
Symbol
Position
Function
Disables all interrupts. If EA = 0, no interrupt is
EA
IE.7
acknowledged. If EA = 1, each interrupt source is
individually enabled or disabled by setting or clearing its
enable bit.
–
IE.6
Reserved
–
IE.5
Reserved
ES
IE.4
Serial Port interrupt enable bit
ET1
IE.3
Timer 1 interrupt enable bit
EX1
IE.2
External interrupt 1 enable bit
ET0
IE.1
Timer 0 interrupt enable bit
EX0
IE.0
External interrupt 0 enable bit
User software should never write 1s to reserved bits, because they may be used in future AT89
products.
11
2487C–MICRO–03/05
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