AT90LS2333-4AC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT90LS2333-4AC Datasheet PDF : 13 Pages
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AT90S/LS2333 and AT90S/LS4433
Instruction Set Summary
Mnemonics
Operands Description
ARITHMETIC AND LOGIC INSTRUCTIONS
ADD
ADC
ADIW
Rd, Rr
Rd, Rr
Rdl,K
Add two Registers
Add with Carry two Registers
Add Immediate to Word
SUB
SUBI
SBC
SBCI
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Subtract two Registers
Subtract Constant from Register
Subtract with Carry two Registers
Subtract with Carry Constant from Reg.
SBIW
AND
ANDI
Rdl,K
Rd, Rr
Rd, K
Subtract Immediate from Word
Logical AND Registers
Logical AND Register and Constant
OR
ORI
EOR
COM
Rd, Rr
Rd, K
Rd, Rr
Rd
Logical OR Registers
Logical OR Register and Constant
Exclusive OR Registers
One’s Complement
NEG
SBR
CBR
Rd
Rd,K
Rd,K
Two’s Complement
Set Bit(s) in Register
Clear Bit(s) in Register
INC
Rd
DEC
Rd
TST
Rd
Increment
Decrement
Test for Zero or Minus
CLR
Rd
SER
Rd
BRANCH INSTRUCTIONS
Clear Register
Set Register
RJMP
k
IJMP
RCALL
k
Relative Jump
Indirect Jump to (Z)
Relative Subroutine Call
ICALL
RET
RETI
CPSE
Rd,Rr
Indirect Call to (Z)
Subroutine Return
Interrupt Return
Compare, Skip if Equal
CP
CPC
CPI
Rd,Rr
Rd,Rr
Rd,K
Compare
Compare with Carry
Compare Register with Immediate
SBRC
SBRS
SBIC
SBIS
Rr, b
Rr, b
P, b
P, b
Skip if Bit in Register Cleared
Skip if Bit in Register is Set
Skip if Bit in I/O Register Cleared
Skip if Bit in I/O Register is Set
BRBS
s, k
BRBC
s, k
BREQ
k
Branch if Status Flag Set
Branch if Status Flag Cleared
Branch if Equal
BRNE
k
BRCS
k
BRCC
k
BRSH
k
Branch if Not Equal
Branch if Carry Set
Branch if Carry Cleared
Branch if Same or Higher
BRLO
k
BRMI
k
Branch if Lower
Branch if Minus
BRPL
k
BRGE
k
BRLT
k
BRHS
k
Branch if Plus
Branch if Greater or Equal, Signed
Branch if Less Than Zero, Signed
Branch if Half Carry Flag Set
BRHC
k
BRTS
k
BRTC
k
Branch if Half Carry Flag Cleared
Branch if T Flag Set
Branch if T Flag Cleared
BRVS
k
BRVC
k
BRIE
k
Branch if Overflow Flag is Set
Branch if Overflow Flag is Cleared
Branch if Interrupt Enabled
BRID
k
Branch if Interrupt Disabled
Operation
Rd ← Rd + Rr
Rd ← Rd + Rr + C
Rdh:Rdl ← Rdh:Rdl + K
Rd ← Rd - Rr
Rd ← Rd - K
Rd ← Rd - Rr - C
Rd ← Rd - K - C
Rdh:Rdl ← Rdh:Rdl - K
Rd ← Rd • Rr
Rd ← Rd • K
Rd ← Rd v Rr
Rd ← Rd v K
Rd ← Rd ⊕ Rr
Rd ← $FF − Rd
Rd ← $00 − Rd
Rd ← Rd v K
Rd ← Rd • ($FF - K)
Rd ← Rd + 1
Rd ← Rd − 1
Rd ← Rd • Rd
Rd ← Rd ⊕ Rd
Rd ← $FF
PC ← PC + k + 1
PC ← Z
PC ← PC + k + 1
PC ← Z
PC ← STACK
PC ← STACK
if (Rd = Rr) PC ← PC + 2 or 3
Rd − Rr
Rd − Rr − C
Rd − K
if (Rr(b)=0) PC ← PC + 2 or 3
if (Rr(b)=1) PC ← PC + 2 or 3
if (P(b)=0) PC ← PC + 2 or 3
if (P(b)=1) PC ← PC + 2 or 3
if (SREG(s) = 1) then PC←PC+k + 1
if (SREG(s) = 0) then PC←PC+k + 1
if (Z = 1) then PC ← PC + k + 1
if (Z = 0) then PC ← PC + k + 1
if (C = 1) then PC ← PC + k + 1
if (C = 0) then PC ← PC + k + 1
if (C = 0) then PC ← PC + k + 1
if (C = 1) then PC ← PC + k + 1
if (N = 1) then PC ← PC + k + 1
if (N = 0) then PC ← PC + k + 1
if (N ⊕ V= 0) then PC ← PC + k + 1
if (N ⊕ V= 1) then PC ← PC + k + 1
if (H = 1) then PC ← PC + k + 1
if (H = 0) then PC ← PC + k + 1
if (T = 1) then PC ← PC + k + 1
if (T = 0) then PC ← PC + k + 1
if (V = 1) then PC ← PC + k + 1
if (V = 0) then PC ← PC + k + 1
if ( I = 1) then PC ← PC + k + 1
if ( I = 0) then PC ← PC + k + 1
Flags
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,C,N,V
Z,C,N,V,H
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
None
None
None
None
None
None
I
None
Z, N,V,C,H
Z, N,V,C,H
Z, N,V,C,H
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
#Clocks
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
3
3
4
4
1/2/3
1
1
1
1/2/3
1/2/3
1/2/3
1/2/3
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
1/2
9
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