2. Overview
The ATtiny13A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny13A achieves
throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-
sumption versus processing speed.
2.1 Block Diagram
Figure 2-1. Block Diagram
8-BIT DATABUS
VCC
GND
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
STACK
POINTER
SRAM
PROGRAM
COUNTER
PROGRAM
FLASH
GENERAL
PURPOSE
REGISTERS
X
Y
Z
ALU
WATCHDOG
OSCILLATOR
WATCHDOG
TIMER
MCU CONTROL
REGISTER
MCU STATUS
REGISTER
TIMER/
COUNTER0
INTERRUPT
UNIT
PROGRAMMING
LOGIC
DATA
EEPROM
CALIBRATED
INTERNAL
OSCILLATOR
TIMING AND
CONTROL
STATUS
REGISTER
ADC /
ANALOG COMPARATOR
DATA REGISTER
PORT B
DATA DIR.
REG.PORT B
PORT B DRIVERS
PB[0:5]
RESET
CLKI
4 ATtiny13A
8126ES–AVR–07/10