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ATTINY828R-MU View Datasheet(PDF) - Atmel Corporation

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Description
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ATTINY828R-MU Datasheet PDF : 20 Pages
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2. Overview
ATtiny828 is a low-power CMOS 8-bit microcontrollers based on the AVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the ATtiny828 achieves throughputs approaching 1 MIPS per MHz allowing
the system designer to optimize power consumption versus processing speed.
Figure 3.
VCC
Block Diagram
RESET GND
POWER
SUPERVISION:
POR
BOD
RESET
CALIBRATED ULP
OSCILLATOR
WATCHDOG
TIMER
PROGRAM
MEMORY
(FLASH)
ON-CHIP
DEBUGGER
EEPROM
CALIBRATED
OSCILLATOR
TIMING AND
CONTROL
DATA
MEMORY
(SRAM)
CPU CORE
PORT A
8-BIT DATA BUS
PORT B
ISP
INTERFACE
DEBUG
INTERFACE
8-BIT
TIMER/COUNTER
TWO-WIRE
INTERFACE
TEMPERATURE
SENSOR
ANALOG
COMPARATOR
VOLTAGE
REFERENCE
16-BIT
TIMER/COUNTER
USART
MULTIPLEXER
ADC
PORT C
PORT D
PA[7:0]
PB[7:0]
PC[7:0]
PD[3:0]
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly
connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single instruction,
executed in one clock cycle. The resulting architecture is compact and code efficient while achieving throughputs up to
ten times faster than conventional CISC microcontrollers.
ATtiny828 [DATASHEET]
5
8371AS–AVR–08/12

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