ATTINY85-15MT View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATTINY85-15MT

8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash

Atmel Corporation 

ATtiny25/45/85

5.4 I/O Memory

The I/O space definition of the ATtiny25/45/85 is shown in “Register Summary” on page 182.

All ATtiny25/45/85 I/Os and peripherals are placed in the I/O space. All I/O locations may be

accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32

general purpose working registers and the I/O space. I/O Registers within the address range

0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the

value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the

instruction set section for more details. When using the I/O specific commands IN and OUT, the

I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using

LD and ST instructions, 0x20 must be added to these addresses.

For compatibility with future devices, reserved bits should be written to zero if accessed.

Reserved I/O memory addresses should never be written.

Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI

instructions will only operate on the specified bit, and can therefore be used on registers contain-

ing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only.

The I/O and Peripherals Control Registers are explained in later sections.

6. System Clock and Clock Options

6.1 Clock Systems and their Distribution

Figure 6-1 presents the principal clock systems in the AVR and their distribution. All of the clocks

need not be active at a given time. In order to reduce power consumption, the clocks to modules

not being used can be halted by using different sleep modes, as described in “Power Manage-

ment and Sleep Modes” on page 31. The clock systems are detailed below.

Figure 6-1.

Clock Distribution

ADC

General I/O

Modules

CPU Core

RAM

Flash and

EEPROM

clkPCK

clkI/O

clkADC

AVR Clock

Control Unit

clkCPU

clkFLASH

Source clock

Reset Logic

Watchdog Timer

System Clock

Prescaler

Watchdog clock

Clock

Multiplexer

Watchdog

Oscillator

PLL

Oscillator

7598H–AVR–07/09

External Clock

CalCibrryastetadl RC

Oscillator

Low-Frequency

Crystal Oscillator

Calibrated RC

Oscillator

21

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