AV4216K View Datasheet(PDF) - APLUS INTEGRATED CIRCUITS

Part Name

Description

Manufacturer

AV4216K

Single-Chip Voice Synthesizing CMOS IC

APLUS INTEGRATED CIRCUITS 

AVxx16K Series

9. TIMING DIAGRAM:

1.> Edge/Level

Edge Mode:

Edge Trigger

OKY/IO1/IO2

AUDIO

Level Trigger

TG1/SC

AUDIO

Level Mode:

Edge Trigger

OKY/IO1/IO2

AUDIO

Level Trigger

OKY/IO1/IO2

AUDIO

Tw

Sub_table N

Sub_table N

Tw

Sub_table N

Sub_table N

Tw

Tw

Sub_table N

Sub_table N

* Note: Tw is the minimum pulse width > debounce time (5.3ms or 20.8us at 6kHz).

2.> Hold/Unhold

Hold:

OKY/IO1/IO2

AUDIO

Unhold:

OKY/IO1/IO2

AUDIO

Sub_table N

Sub_table N

* Note: Both Edge and Level have Hold and Unhold option.

3.> Retrigger/Irretrigger

Retrigger:

OKY/IO1/IO2

AUDIO

Sub_table N

Sub_table N

Irretrigger:

Play from beginning immediately.

OKY/IO1/IO2

AUDIO

Sub_table N

Ignore trigger input signal during playing.

Sub_table N

Sub_table N

4.> Status Output (IO1/IO2)

AUDIO

Stop_High pulse

Voice

Mute

172ms at 6kHz

Busy_High active

Busy_Low active

LED 3Hz/6Hz flash

3Hz or 6Hz for playing speed at 6kHz

LED dynamic 2/4 : When the voice amplitude is higher than 2/4 full-scale amplitude, LED ON.

LED ON means status output low.

7

Rev 1.1

2003/9/18

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