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AV0332E View Datasheet(PDF) - APLUS INTEGRATED CIRCUITS

Part Name
Description
Manufacturer
AV0332E
Aplus
APLUS INTEGRATED CIRCUITS Aplus
AV0332E Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
AVXX32E -A SERIES
Pin Description
Pin Name I/O
VDD
Power
TEST
In
OSC
In
OKY
In
TG0, TG1
TG3_OPC
OPB
OPA
PWM1,
PWM2
VSS
In
In
Out
Out
Out
Out
Power
Description
Positive power supply
Test enable pad, high-active, pull-low
With resister connected to VDD for system clock generating
Trigger input, active-high, with internal pull_low resistor. Can define
as sequential key or random key.
Trigger input, active-high with internal pull_low resistor.
Trigger input, active-high
Status output
Status output
Status output
Voltage output to drive speaker or buzzer
Negative power supply
Absolute Maximum Rating
Symbol
VDD~VSS
VIN (for input)
VOUT (for all outputs)
T (operating)
T (storage)
Rating
-0.5 ~ +0.5
VSS-0.3 < VIN < VDD+0.3
VSS < VOUT < VDD
-10 ~ +60
-55 ~ +125
Unit
V
V
V
к
к
DC Characteristics
Symbol
Parameter
Min Typ. Max Unit
Condition
VDD
Operating Voltage
2.4 3.0 5.0 V
Isb
Supply Standby
Ϋ Ϋ 1 ӴA VDD=3.0V, I/O open
Iop
Current Operating
Ϋ Ϋ 400 ӴA VDD=3.0V, No loading
IOL
OPA, OPB source Current Ϋ –20 Ϋ mA VDD=3.0V, VIP=2.7V
Ioh
OPA, OPB sink Current
Ϋ 20 Ϋ mA VDD=3.0V, VOP=0.3V
d F/F
Frequency Variation by diff.
lot
Ϋ
Ϋ
r10
%
VDD=4.5V
fOSC =384kHz
Function Diagram
1. OPA/B/C (1:0) are the output options.
Output
Option
0(00)
OPA
Status
BH
LED
+Fast
OPB
Status
BH
LED
-Fast
OPC
Status
BH
LED
+Fast
1(01)
DL
+Slow
DL
-Slow
DL
+Slow
2(10)
SH
Dy07
SH
Dy09
BL
ON
3(11)
DH
OFF
DH
ON
DH
OFF
Status output mode:
SH: Single pulse output, hi-level output
BH: Busy output, hi-level output
Preliminary
9-2
Ver. 0.1

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