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HSP48901JC-30(2004) View Datasheet(PDF) - Intersil

Part Name
Description
Manufacturer
HSP48901JC-30
(Rev.:2004)
Intersil
Intersil Intersil
HSP48901JC-30 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Timing Waveforms
CLK
DIN 0-7
DOUT 0-19
tPWL
tCYCLE
tPWH
tDS
tDH
tOUT
FIGURE 4. FUNCTIONAL TIMING
HSP48901
LD
tAS
A0-2
CIN0-7
tLPW
tCS
tAH
tCH
FIGURE 5. CONFIGURATION TIMING
CLK
LD
tLCS
FIGURE 6. SYNCHRONOUS LOAD TIMING
CLK
tHS
tHH
tHS
HOLD
INTERNAL
CLOCK
FIGURE 7. HOLD TIMING
FRAME
CLK
tFPW
tFS
FIGURE 8. FRAME TIMING
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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