BT852 View Datasheet(PDF) - Conexant Systems

Part Name

Description

Manufacturer

BT852

Multiport YCrCb to NTSC / PAL / SECAM Digital Video Encoder

Conexant Systems 

1.0 Functional Description

1.1 Pin Descriptions

Bt860/861

Multiport YCrCb to NTSC/PAL /SECAM

Table 1-1. Pin Assignments (3 of 3)

Pin Name I/O

Pin #

Description

CLKIN

RESET*

I 71

I 63

XTI

I 67

XTO

O 68

SYSTEM PINS

2x pixel clock input (TTL compatible).

Reset control input (TTL compatible). Setting to zero resets video timing

(horizontal, vertical, subcarrier counters to the start of VSYNC of first field), the

serial control interface, and all registers. RESET* must be a logical 1 for normal

operation. Holding this pin low for 50 clocks or more will ensure that all functions

are properly reset.

Crystal input for PLL.

Crystal output for PLL.

POWER AND GROUND

VAA

VDD

AGND

GND

VPLL

PGND

VDDMAX

— 55, 46, 52

Analog power. See Section 4.1 of this document.

— 7, 28, 38, 64, 78 Digital power. See Section 4.1 of this document.

— 41, 50, 51, 60 Analog ground. See Section 4.1 of this document.

— 8, 17, 27, 37,

61, 65, 77

Digital ground. See Section 4.1 of this document.

— 69

Dedicated power supply for PLL.

— 66

Dedicated ground for PLL.

I 18

This pin must be tied to the maximum digital input value. Use 3.3 V if only 3.3 V

inputs are used, and 5 V if 3.3/5 V inputs are used.

NOTE(S):

(1) If these inputs are not used, they should be connected to GND.

(2) These input are normally sampled on the rising edge of the system clock, but can be sampled on the falling edge by setting

register bit PCLK_EDGE = 1.

(3) These inputs are normally sampled on the rising edge of VIDCLK, but can be sampled on the falling edge by setting register bit

VIDCLK_EDGE = 1.

1-4

Conexant

D860DSA

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