BT856 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

BT856

YCrCb or RGB to NTSC/PAL Digital Video Encoder

Unspecified 

CIRCUIT DESCRIPTION

Pixel Input Ranges and Colorspace Conversion

Bt856/7

Pixel Input Ranges and Colorspace Conversion

RGB Inputs

With YCMODE set to a logical zero (RGB mode), digital RGB data with a 0–255

range is input via the R0–R7, G0–G7, and B0–B7 inputs. By default, the gray-scale

range of 0–255 represents 7.5–100 IRE for NTSC, or 300–1000 mV for PAL.

Alternatively, software bit D5 of register 0xDC can alter pixel scaling and dis-

able or enable the 7.5 IRE setup. When this bit is enabled, PAL video can be gen-

erated using NTSC/PAL–M blanking levels and 7.5 IRE setup, and default

NTSC/PAL–M pixel scaling is applied (0–255 represents 7.5–100 IRE); or,

NTSC/PAL–M video can be generated using PAL scaling (0–255 represents 0–100

IRE) without the 7.5 IRE setup. NTSC mode with setup disabled has 2% less

black-to-white range compared to setup enabled.

If the GAMMA* pin is high, no prescaling is performed to compensate for gam-

ma characteristics of the receiver. If GAMMA* is low, gamma pre-correction is

applied per CCIR 709. In the following equations, x represents the pixel input val-

ue and g represents the corrected value.

525-Line Systems (NTSC, PAL–M):

for x < 5, g = 4.5 * x

for x > 4, g = 255 * (1.099 * (x/255)(1/2.2) – 0.099)

625-Line Systems (PAL–B, D, G, H, I, N, N–Argentina):

for x < 5, g = 9 * x

for x > 4, g = 255 * (1.099 * (x/255)(1/2.8) – 0.099)

The standard CCIR 624 matrix is used to convert RGB to YUV:

Y = +0.299R + 0.587G + 0.114B

U = –0.147R – 0.289G + 0.436B

V = +0.615R – 0.515G – 0.100B

NTSC 33% axis rotation is performed in the subcarrier encoding. Data is round-

ed to the nearest 9-bit DAC value.

For RGBOUT mode (RGBOUT = 1 with YC mode = 0), the 8-bit RGB inputs

directly feed the 9-bit DACs without any scaling or level-shifting. Therefore, only

half of the current drive is available in this mode. Gamma precorrection is not ap-

plied to RGB outputs.

An averaging interpolation filter is available to upsample the RGB pixel stream.

Upsampling is enabled or disabled in either of two ways: with the GAMMA* pin

or with software bit D2 of register 0xDA. The pin-override switch (bit D4 of reg-

ister 0xDC) determines which method has priority: if the override is high, then

software is used; if the override is low, then the GAMMA* pin is used. In both cas-

es (GAMMA* pin or bit D2 of register 0xDA), a logical low enables upsampling

and a logical high disables upsampling. The pipeline delay is the same regardless

of whether upsampling is active or not (please see AC Characteristics for pipeline

delay).

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