BT856 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

BT856

YCrCb or RGB to NTSC/PAL Digital Video Encoder

Unspecified 

CIRCUIT DESCRIPTION

Pin Descriptions

Pin Name

CVBS/B

CVBS/G

C/R

Y/CVBS

I/O

O2

O4

O6

O8

Pin #

RGBOUT

I 10

FIELD

O 11

TEST

GAMMA*

I 12, 27

I 25

YC MODE

I 26

Brooktree®

Description

Composite video with blanking and sync, or Blue.

Composite video with blanking and sync, or Green.

Modulated chrominance, or Red.

Luminance (with blanking, sync, and, optionally, Macrovision pulses,

and/or closed-captioning encoding), or Composite video.

Analog RGB control input (TTL compatible). A logical one configures

the device to output analog RGB (RGBOUT mode). A logical zero con-

figures the device to generate S-video along with a second composite

video output. This pin may be connected directly to VAA or GND.

Field control output (TTL compatible). FIELD transitions after the rising

edge of CLOCK, two clock cycles following falling HSYNC*. It is a logi-

cal zero during odd fields and is a logical one during even fields.

These pins are reserved for testing and must be connected to a logical

zero, such as GND, for normal operation.

RGB gamma control input (TTL compatible). In RGB mode, a logical

zero enables the gamma correction circuitry. For RGB mode, a logical

one provides a linear response. In 8-bit YC mode, this pin is used to

select between inputs on B0–B7 (logical one) or G0–G7 (logical zero)

pixel ports. In RGBOUT mode, if bit D4 of register 0xDC is low, this pin

can be used to enable upsampling (logical zero) or disable upsampling

(logical one). In RGBOUT mode, the GAMMA* pin will also select an

oversampling filter (on the G0–G7 port for 8-bit YCmode) when low,

unless overridden by the combination of bits D2 at subaddress 0xDA

and D4 at subaddress 0xDC. This override will enable/disable oversam-

pling for any input to RGB outputs. This pin may be connected directly

to VAA or GND.

RGB or YCrCb select input (TTL compatible). A logical one configures

the pixel inputs for YCrCb operation (YC mode). A logical zero config-

ures the pixel inputs for RGB operation (RGB mode), and can be

switched on each clock cycle. This pin may be connected directly to

VAA or GND.

1

Share Link: