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BU1424K View Datasheet(PDF) - ROHM Semiconductor

Part Name
Description
Manufacturer
BU1424K
ROHM
ROHM Semiconductor ROHM
BU1424K Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Multimedia ICs
Pin No.
Pin name I / O
27
VSY
I
29
PIXCLK
O
32
INT
I
33
SLABEB
I
34
ADDH
I
35
Vref-C
I
Equivalent circuit
BU1424K
Function
Vertical synchronization signals
(VSYNC) are input (when SLABEB =
LOW) or output (when SLABEB =
HIGH) here.
The internal processing clock is divid-
ed in half and then output. Data is
read at the point at which the edge of
this clock changes. This can also be
used as the clock for the OSD IC.
This pin switches between interlace
(when HIGH) and non-interlace
(when LOW) modes. This pin is effec-
tive in both the VIDEO-CD and CD-G
modes.
This pin switches between the Master
(when HIGH) and Slave (when LOW)
modes. It is effective in the non-
interlace mode, and it switches bet-
ween – 0.5 lines (when LOW) and +
0.5 lines (when HIGH) for the number
of lines in an interlace field.
This is the reference voltage generator
circuit monitoring pin which deter-
mines the output amplitude (output cur-
rent for 1 LSB) of the DAC.
8

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