C8051F326 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F326

Full Speed USB, 16 kB Flash MCU Family

Silicon Laboratories 

C8051F326/7

List of Figures

1. System Overview

Figure 1.1. C8051F326 Block Diagram .................................................................... 14

Figure 1.2. C8051F327 Block Diagram .................................................................... 15

Figure 1.3. Typical Connections for the C8051F326................................................ 16

Figure 1.4. Typical Connections for the C8051F327................................................ 16

Figure 1.5. Comparison of Peak MCU Execution Speeds ....................................... 17

Figure 1.6. On-Chip Clock and Reset ...................................................................... 18

Figure 1.7. On-Board Memory Map.......................................................................... 19

Figure 1.8. USB Controller Block Diagram............................................................... 20

Figure 1.9. Development/In-System Debug Diagram............................................... 21

2. Absolute Maximum Ratings

3. Global DC Electrical Characteristics

4. Pinout and Package Definitions

Figure 4.1. C8051F326 QFN-28 Pinout Diagram (Top View) .................................. 27

Figure 4.2. C8051F327 QFN-28 Pinout Diagram (Top View) .................................. 28

Figure 4.3. QFN-28 Package Drawing ..................................................................... 29

Figure 4.4. QFN-28 Recommended PCB Land Pattern ........................................... 30

5. Voltage Regulator (REG0)

Figure 5.1. REG0 Configuration: USB Bus-Powered ............................................... 32

Figure 5.2. REG0 Configuration: USB Self-Powered ............................................... 32

Figure 5.3. REG0 Configuration: USB Self-Powered, Regulator Disabled .............. 33

Figure 5.4. REG0 Configuration: No USB Connection............................................. 33

6. CIP-51 Microcontroller

Figure 6.1. CIP-51 Block Diagram............................................................................ 35

Figure 6.2. Memory Map .......................................................................................... 41

7. Reset Sources

Figure 7.1. Reset Sources........................................................................................ 57

Figure 7.2. Power-On and VDD Monitor Reset Timing ............................................ 58

8. Flash Memory

Figure 8.1. Flash Program Memory Map and Security Byte .................................... 66

9. External RAM

Figure 9.1. External Ram Memory Map ................................................................... 69

Figure 9.2. XRAM Memory Map Expanded View..................................................... 70

10. Oscillators

Figure 10.1. Oscillator Diagram................................................................................ 71

11. Port Input/Output

Figure 11.1. Port I/O Functional Block Diagram ....................................................... 79

Figure 11.2. Port I/O Cell Block Diagram ................................................................. 80

12. Universal Serial Bus Controller (USB0)

Figure 12.1. USB0 Block Diagram............................................................................ 87

Figure 12.2. USB0 Register Access Scheme........................................................... 90

Figure 12.3. USB FIFO Allocation ............................................................................ 95

13. UART0

Figure 13.1. UART0 Block Diagram ....................................................................... 117

Rev. 1.1

7

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