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CAT25C08LA View Datasheet(PDF) - Catalyst Semiconductor => Onsemi

Part Name
Description
Manufacturer
CAT25C08LA
Catalyst
Catalyst Semiconductor => Onsemi Catalyst
CAT25C08LA Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CAT25C08/16
FUNCTIONAL DESCRIPTION
The CAT25C08/16 supports the SPI bus data transmis-
sion protocol. The synchronous Serial Peripheral Inter-
face (SPI) helps the CAT25C08/16 to interface directly
with many of todays popular microcontrollers. The
CAT25C08/16 contains an 8-bit instruction register.
(The instruction set and the operation codes are de-
tailed in the instruction set table)
After the device is selected with CS going low, the first
byte will be received. The part is accessed via the SI pin,
with data being clocked in on the rising edge of SCK.
The first byte contains one of the six op-codes that define
the operation to be performed.
PIN DESCRIPTION
SI: Serial Input
SI is the serial data input pin. This pin is used to input all
opcodes, byte addresses, and data to be written to the
25C08/16. Input data is latched on the rising edge of the
serial clock for SPI modes (0, 0 & 1, 1).
SO: Serial Output
SO is the serial data output pin. This pin is used to
transfer data out of the 25C08/16. During a read cycle,
data is shifted out on the falling edge of the serial clock
for SPI modes (0,0 & 1,1).
SCK: Serial Clock
SCK is the serial clock pin. This pin is used to synchro-
nize the communication between the microcontroller
Figure 1. Sychronous Data Timing
VIH
CS
VIL
VIH
SCK
VIL
VIH
SI
VIL
tCSS
tWH
tSU
tH
VALID IN
VOH
HI-Z
SO
VOL
Note: Dashed Line= mode (1, 1) – – – – –
tCS
tCSH
tWL
tRI
tFI
tV
tHO
tDIS
HI-Z
INSTRUCTION SET
Instruction
WREN
WRDI
RDSR
WRSR
READ
WRITE
Opcode
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
Operation
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
Doc. No. 1016, Rev. C
4
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice

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