CAT93C46R(2013) View Datasheet(PDF) - ON Semiconductor
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CAT93C46R Datasheet PDF : 12 Pages
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CAT93C46R
Table 4. PIN CAPACITANCE
Symbol
Test
Conditions
Min
Typ
Max Units
COUT (Note 4) Output Capacitance (DO)
VOUT = 0 V
5
pF
CIN (Note 4)
Input Capacitance (CS, SK, DI, ORG)
VIN = 0 V
5
pF
4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
Table 5. A.C. CHARACTERISTICS (Note 5)
VCC = 1.8 V − 5.5 V
VCC = 4.5 V − 5.5 V
Symbol
Parameter
Min
Max
Min
Max
Units
tCSS
CS Setup Time
50
50
ns
tCSH
CS Hold Time
0
0
ns
tDIS
DI Setup Time
100
50
ns
tDIH
DI Hold Time
100
50
ns
tPD1
Output Delay to 1
tPD0
Output Delay to 0
0.25
0.1
ms
0.25
0.1
ms
tHZ (Note 6)
Output Delay to High−Z
100
100
ns
tEW
Program/Erase Pulse Width
5
5
ms
tCSMIN
tSKHI
Minimum CS Low Time
Minimum SK High Time
0.25
0.1
ms
0.25
0.1
ms
tSKLOW
Minimum SK Low Time
0.25
0.1
ms
tSV
Output Delay to Status Valid
0.25
0.1
ms
SKMAX
Maximum Clock Frequency
DC
2
DC
4
MHz
5. Test conditions according to “A.C. Test Conditions” table.
6. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
Table 6. POWER−UP TIMING (Notes 4 and 7)
Symbol
Parameter
Max
tPUR
Power−up to Read Operation
1
tPUW
Power−up to Write Operation
1
7. tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
Units
ms
ms
Table 7. A.C. TEST CONDITIONS
Input Rise and Fall Times
Input Pulse Voltages
Timing Reference Voltages
Input Pulse Voltages
Timing Reference Voltages
Output Load
v 50 ns
0.4 V to 2.4 V
4.5 V v VCC v 5.5 V
0.8 V, 2.0 V
4.5 V v VCC v 5.5 V
0.2 VCC to 0.7 VCC
1.8 V v VCC v 4.5 V
0.5 VCC
1.8 V v VCC v 4.5 V
Current Source IOLmax/IOHmax; CL = 100 pF
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