CDB5335 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CDB5335 Datasheet PDF : 18 Pages
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CDB5334/35/60
Switch # 0 = closed, 1 = open
Comment
8, 7 MCLK_S1, MCLK_S0 Divides MCLK_5335 to generate MCLK_8402 for the CS8402A trnsmitter
*0 0
Generates a 128x Fs clock when using a 256x Fs oscillator
01
RESERVED
10
Generates a 128x Fs clock when using a 384x Fs oscillator
11
Generates a 128x Fs clock when using a 512x Fs oscillator
6, 5
*0 0
RESERVED
4, 3
DIF1, DIF0
Selects the digital interface format for the CS5334/35/60, and CS8402A
*0 0
Configures the CS5334/35/60 for Format 0, and the CS8402A for Format 1
01
Configures the CS5334/35/60 for Format 1, and the CS8402A for Format 1
10
Configures the CS5334/35/60 for Format 2 (I2S), and the CS8402A for Format 4
(I2S)
11
Places the CS5334/35/60 in power down mode
2, 1
PU_S1, PU_S0 Adjusts the frequency of the Peak Update signal for PSL bits
*0 0
Updates the PSL bits at a frequency of LRCK/211
01
Updates the PSL bits at a frequency of LRCK/213
10
Updates the PSL bits at a frequency of LRCK/215
11
Updates the PSL bits at a frequency of LRCK/217
Table 3. Switch Definitions
Switch # 0 = closed, 1 = open
Comment
6
PRO = 0
Consumer Mode (C0 = 0)
8, 5
FC1, FC0
C24, C25, C26, C27 - Sample Frequency
00
0000 - 44.1 kHz
*0 1
0100 - 48 kHz
10
1100 - 32 kHz
11
0000 - 44.1 kHz, CD Mode
7
C3
C3, C4, C5 - Emphasis (1 of 8 bits)
*1
000 - None
0
100 - 50/15 µs
4
C2
C2 - Copy/Copyright
*1
0 - Copy Inhibited /Copyright Assered
0
1 - Copy Permitted/Copyright Not Asserted
3
C15
C15 - Generates Status
*1
0 - Definition is based on category code
0
1 - See CS8402A Data Sheet, App. A
1, 2
C8, C9
C8 - C14 - Category Code (2 of 7 bits)
11
0000000 - General
10
0100000 - PCM encoder/decoder
01
1000000 - Compact Disk - CD
*0 0
1100000 - Digital Audio Tape - DAT
* Default setting from factory
Table 4. CS8402A Switch Definitions - Consumer Mode
6
DS194DB3
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