CDB5396 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CDB5396

120 dB, 96 kHz Audio A/D Converter

Cirrus Logic 

CS5396 CS5397

S/M - Slave or Master Mode, Pin 17.

When high, the device is configured for Slave mode where LRCK and SCLK are inputs. The

device is configured for Master mode where LRCK and SCLK are outputs when S/M is low.

CAL - Calibration, Pin 10.

Activates the calibration of the tri-level delta-sigma modulator.

Digital Pin Definitions for CONTROL-PORT MODE

CDIN - Control Port Data Input, Pin 18.

Control port data input for SPI mode.

Control port data input and output for I2C mode.

CS - Chip Select Input, Pin 19.

Control port chip select for SPI mode. The CS5396/97 monitors the state of CS during power-

up and will configure to an SPI interface if this pin is held low. Conversely, if held high, the

port will configure to a I2C interface.

CCLK - Control Port Clock Input, Pin 17.

Control port clock input pin for both I2C and SPI modes.

CAL - Calibration, Pin 10.

CAL pin is not functional in Control Port Mode and should be connected to ground.

Digital Outputs

DACTL- Digital to Analog Control Output, Pin 9.

Must be connected to ADCTL. This signal enables communication from the digital circuits to

the analog circuits.

SDATA1 - Digital Audio Data Output #1, Pin 16.

Stand-Alone Mode - The 24-bit audio data is presented MSB first, in 2’s complement format.

Control Port Mode - The 24 audio data bits are presented MSB first, in 2’s complement format.

The audio data can be followed by 8 Peak Signal Level bits which indicate the peak signal

level. The additional audio data options include; 16, 18, or 20-bit data with or without

psychoacoustically optimized dither; or the output of the Low Group Delay filter. The SDATA1

output is completely independent from SDATA2. The mode selection between Stand-Alone and

Control Port mode is determined by the state of the SDATA1 pin during power-up. A 47 kΩ

pull-up resistor on SDATA1 will select the Control Port mode. However, the control port will

not response to CCLK and CDIN until the pull-up on the SDATA1 pin is released.

DS229PP2

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