CDB5361 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CDB5361

114 dB, 192 kHz, Multi-Bit Audio A/D Converter

Cirrus Logic 

CS5361

LIST OF FIGURES

Figure 1. Single Speed Mode Stopband Rejection ..................................................... 8

Figure 2. Single Speed Mode Transition Band ........................................................... 8

Figure 3. Single Speed Mode Transition Band (Detail) .............................................. 8

Figure 4. Single Speed Mode Passband Ripple ......................................................... 8

Figure 5. Double Speed Mode Stopband Rejection ................................................... 8

Figure 6. Double Speed Mode Transition Band ......................................................... 8

Figure 7. Double Speed Mode Transition Band (Detail) ............................................. 9

Figure 8. Double Speed Mode Passband Ripple ....................................................... 9

Figure 9. Quad Speed Mode Stopband Rejection ...................................................... 9

Figure 10. Quad Speed Mode Transition Band .......................................................... 9

Figure 11. Quad Speed Mode Transition Band (Detail) ............................................. 9

Figure 12. Quad Speed Mode Passband Ripple ........................................................ 9

Figure 13. Master Mode, Left Justified SAI .............................................................. 12

Figure 14. Slave Mode, Left Justified SAI ................................................................ 12

Figure 15. Master Mode, I2S SAI .............................................................................. 12

Figure 16. Slave Mode, I2S SAI ................................................................................ 12

Figure 17. OVFL Output Timing ............................................................................... 12

Figure 18. Left Justified Serial Audio Interface ......................................................... 13

Figure 19. I2S Serial Audio Interface ........................................................................ 13

Figure 20. OVFL Output Timing, I2S Format ............................................................ 13

Figure 21. OVFL Output Timing, Left-Justified Format ............................................. 13

Figure 22. Typical Connection Diagram ................................................................... 15

Figure 23. CS5361 Master Mode Clocking ............................................................... 17

Figure 24. CS5361 Recommended Analog Input Buffer .......................................... 18

LIST OF TABLES

Table 1.

Table 2.

Table 3.

Table 4.

CS5361 Mode Control .............................................................................. 16

CS5361 Slave Mode Clock Ratios ........................................................... 16

CS5361 Common Master Clock Frequencies .......................................... 17

Revision History ....................................................................................... 23

DS467F2

3

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