CDB5368(2005) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CDB5368
(Rev.:2005)

114 dB, 192 kHz, 8-Channel A/D Converter

Cirrus Logic 

CS5368

TABLE OF CONTENTS

1. PIN DESCRIPTION ...................................................................................................... 9

2. CHARACTERISTICS AND SPECIFICATIONS.......................................................... 13

Specified Operating Conditions .............................................................................................. 13

Absolute Ratings .................................................................................................................... 13

System Clocking ..................................................................................................................... 13

Thermal Characteristics.......................................................................................................... 13

DC Power CS5368 ................................................................................................................. 14

Logic Levels ........................................................................................................................... 14

PSRR, Vq and FILT+ Characteristics ..................................................................................... 14

Analog Performance (CS5368-CQZ)...................................................................................... 15

Analog Performance (CS5368-DQZ)...................................................................................... 16

Digital Filter Characteristics ................................................................................................... 17

Serial Audio Interface - I²S/LJ Timing ..................................................................................... 18

Serial Audio Interface - TDM Timing....................................................................................... 19

Overflow Timeout ................................................................................................................... 19

Switching Specifications - Control Port - I²C Timing ............................................................... 20

Switching Specifications - Control Port - SPI Timing .............................................................. 21

3. TYPICAL CONNECTION DIAGRAM ....................................................................... 23

3.1 Suggested Analog Input Buffer......................................................................................... 24

4. APPLICATIONS ......................................................................................................... 25

4.1 Power ............................................................................................................................... 25

4.2 Clocking ............................................................................................................................ 25

4.3 Stand-Alone Operation ..................................................................................................... 26

4.4 Control-Port Operation ..................................................................................................... 26

4.5 DC Offset Control ............................................................................................................. 26

4.6 Serial Audio Interface (SAI) .............................................................................................. 26

4.6.1 General Description ............................................................................................. 26

4.6.2 Master and Slave Operation ................................................................................ 26

4.6.3 Synchronization of Multiple Devices .................................................................... 27

4.6.4 Sample Rate Ranges........................................................................................... 27

4.6.5 Using M1 and M0 to Set Sampling Parameters................................................... 27

4.6.6 Using DIF1 and DIF0 to Set Serial Audio Interface Format ................................. 28

4.6.7 Master Mode Audio Clocking ............................................................................... 28

4.6.8 Slave Mode Audio Clocking ................................................................................. 28

4.6.9 Master and Slave Clock Frequencies .................................................................. 29

4.7 Serial Audio Formats ........................................................................................................ 30

4.7.1 LJ and I²S FORMAT ............................................................................................ 31

4.7.2 TDM Format......................................................................................................... 31

4.8 Overflow Detection ........................................................................................................... 31

4.8.1 Stand-Alone Mode ............................................................................................... 31

4.8.2 Control-Port Mode................................................................................................ 31

4.9 Control Port Operation...................................................................................................... 31

4.9.1 SPI Mode ............................................................................................................. 31

4.9.2 I²C Mode .............................................................................................................. 32

5. REGISTER MAP......................................................................................................... 35

5.1 Register Quick Reference ............................................................................................... 35

5.2 00h (REVI) Chip ID Code & Revision Register................................................................. 35

5.3 01h (GCTL) Global Mode Control Register ..................................................................... 35

DS624A1

3

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