CS8403 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CS8403 Datasheet PDF : 33 Pages
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CS8403A CS8404A
0
Status register 0
1
Control Register 1
2
Control Register 2
3
Control Register 3
4
5
User Data
6
7
8
9
A
B
1st Four
Bytes of
C.S. Data
1st Four
Bytes of
C.S. Data
1st Four
Bytes of
Left C. S.
Data
C
U
D
C. S. Left C. S.
N
AE
Data
Data
D
DF
E
D 10
1st Four
F
R 11
E
S
12
Bytes of
I
Right
N
C. S.
E
S 13
Data
D
14
Last 20
Bytes
15 Channel
Right
C. S.
16 Status
Data
17 Data Auxiliary
18
Data
19
1A
1B
1C
1D
1E
1F
0
1
2
3
Memory Mode
Figure 5. CS8403A Buffer Memory Modes
B0 select one of three modes for the buffer memo-
ry. The different modes are shown in Figure 5 and
the bit combinations in Table 2. More information
on the different modes can be found in the Buffer
Memory section. Bit 2, CRCE, is the channel sta-
tus CRCC enable and should only be used in pro-
fessional mode. When CRCE is high, the channel
status data cyclic redundancy check characters are
7
6
5
4
3
2
1
0
X:00
FLAG2 FLAG1 FLAG0
FLAG2: High for first four bytes of channel status
FLAG1: Memory mode dependent - See Figure 11
FLAG0: High for last two bytes of user data
Figure 6. Status Register
7
6
5
4
3
2
1
0
X:01 BKST TRNPT
MASK2 MASK1 MASK0
BKST: Causes realignment of data block when set to “1”
TRNPT: Selects Transparent Mode appropriatley setting data delay
through device
MASK2: Interrupt mask for FLAG2. A “1” enables the interrupt.
MASK1: Interrupt mask for FLAG1.
MASK0: Interrupt mask for FLAG0.
Figure 7. Control Register 1
7
6
5
4
3
2
1
0
X:02 M1
M0
V
B1
B0 CRCE MUTE RST
M1:
M0:
V:
B1:
B0:
CRCE:
MUTE:
RST:
with M0, selects MCK frequency.
with M1, selects MCK frequency.
Validity bit of current sample.
with B0, selects the buffer memory mode
with B1, selects the buffer memory mode
Channel status CRC Enable. Professional mode only.
When clear, transmitted audio data is set to zero.
When clear, drivers are disabled, frame counters cleared.
Figure 8. Control Register 2
M1
M0
MCLK
0
0
128x Input Word Rate
0
1
192x Input Word Rate
1
0
256x Input Word Rate
1
1
384x Input Word Rate
Table 1. MCLK Frequencies
B1 B0 Mode Buffer Memory Contents
0
0
0
Channel Status
0
1
1
Auxiliary Data
1
0
2 Independent Channel Status
1
1
3
Reserved
Table 2. Buffer Memory Modes
10
DS239PP1
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