MXED101TP View Datasheet(PDF) - Clare Inc => IXYS

Part Name

Description

Manufacturer

MXED101TP

30V, 192-Channel OLED Display Driver

Clare Inc => IXYS 

MXED101

Timing Diagrams - Load Data Pattern Timing

CLKSH

LTKNB (IN)

RTKNB (OUT)

LE

DA/DB/DC(5-0)

64

1

CLKEX

1

LOAD DATA PATTERN MACRO TIMING

1 DIE DISPLAY - LOAD ONE 64 BIT PATTERN FROM LEFT

64 DATA CYCLES

CLKSH

LTKNB - 1ST DIE

RTKNB - 1ST DIE

LE

DA/DB/DC(5-0)

CLKEX

N*64 1

1

LOAD 1ST DIE

N DIE DISPLAY - LOAD N 64 BIT PATTERNS FROM LEFT

N * 64 DATA CYCLES

64

128

LOAD 2ND DIE

64

1

64

N*64 1

64

LOAD NTH DIE

FIGURE 2

TIMING1

MICRONIX

INTEGRATED

SYSTEMS

INC

SIZE

A

PROJ/PROD NO.

MXHV101

FSCM NO.

DWG NO.

REV

0F4G3

11133

B

Aliso Viejo, California 62656

- SCALE

SHEET

1

CLKSH

LTKNB (IN)

RTKNB (OUT)

LE

DA/DB/DC(5-0)

CLKEX

LOAD DATA PATTERN TIMING

LOADING DATA FROM LEFT

tSTD

tSTD

tTSU

tTHD

tTPW

N*64

tDLD

tLAPW

tDLE

64

tLDD

tDSU

1

tLED

1

tDHD

10

www.clare.com

Rev. 9

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