CY14B256L-SP35XC(2007) View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY14B256L-SP35XC Datasheet PDF : 17 Pages
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Table 1. Mode Selection
CE
WE
H
X
L
H
L
L
L
H
L
H
L
H
L
H
PRELIMINARY
CY14B256L
OE
A13 – A0
Mode
IO
Power
X
X
Not Selected Output High-Z
Standby
L
X
Read SRAM
Output Data
Active
X
X
Write SRAM
Input Data
Active
L
0x0E38
Read SRAM
Output Data
Active[1, 2, 3]
0x31C7
Read SRAM
Output Data
0x03E0
Read SRAM
Output Data
0x3C1F
Read SRAM
Output Data
0x303F
Read SRAM
Output Data
0x03F8
AutoStore
Output Data
Disable
L
0x0E38
Read SRAM
Output Data
Active[1, 2, 3]
0x31C7
Read SRAM
Output Data
0x03E0
Read SRAM
Output Data
0x3C1F
Read SRAM
Output Data
0x303F
Read SRAM
Output Data
0x07F0
AutoStore
Output Data
Enable
L
0x0E38
Read SRAM
Output Data Active ICC2[1, 2, 3]
0x31C7
Read SRAM
Output Data
0x03E0
Read SRAM
Output Data
0x3C1F
Read SRAM
Output Data
0x303F
Read SRAM
Output Data
0x0FC0 Nonvolatile Store Output High-Z
L
0x0E38
Read SRAM
Output Data
Active[1, 2, 3]
0x31C7
Read SRAM
Output Data
0x03E0
Read SRAM
Output Data
0x3C1F
Read SRAM
Output Data
0x303F
Read SRAM
Output Data
0x0C63
Nonvolatile Output High-Z
Recall
Notes
1. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.
2. While there are 15 address lines on the CY14B256L, only the lower 14 lines are used to control software modes.
3. IO state depends on the state of OE. The IO table shown assumes OE low.
Document #: 001-06422 Rev. *E
Page 5 of 17
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