CY2213(2012) View Datasheet(PDF) - Cypress Semiconductor
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CY2213 Datasheet PDF : 16 Pages
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CY2213
CY2213 Two-Wire Serial Interface
Introduction
The CY2213 has a two-wire serial interface designed for data
transfer operations, and is used for programming the P and Q
values for frequency generation. Sclk is the serial clock line
controlled by the master device. Sdata is a serial bidirectional
data line. The CY2213 is a slave device and can either read or
write information on the dataline upon request from the master
device.
Figure 2 shows the basic bus connections between master and
slave device. The buses are shared by a number of devices and
are pulled high by a pull up resistor.
Serial Interface Specifications
Figure 3 shows the Basic Transmission Specification. To begin
and end a transmission, the master device generates a start
signal (S) and a stop signal (P). Start (S) is defined as switching
the Sdata from HIGH to LOW while the Sclk is at HIGH. Similarly,
stop (P) is defined as switching the Sdata from LOW to HIGH
while holding the Sclk HIGH. Between these two signals, data on
Sdata is synchronous with the clock on the Sclk. Data is allowed
to change only at LOW period of clock, and must be stable at the
HIGH period of clock. To acknowledge, drive the Sdata LOW
before the Sclk rising edge and hold it LOW until the Sclk falling
edge.
Serial Interface Format
Each slave carries an address. The data transfer is initiated by a
start signal (S). Each transfer segment is 1 byte in length. The
slave address and the read/write bit are first sent from the master
device after the start signal. The addressed slave device must
acknowledge (Ack) the master device. Depending on the
Read/Write bit, the master device either writes data into (logic 0)
or reads data (logic 1) from the slave device. Each time a byte of
data is successfully transferred, the receiving device must
acknowledge. At the end of the transfer, the master device
generates a stop signal (P).
Serial Interface Transfer Format
Figure 3 shows the serial interface transfer format used with the
CY2213. Two dummy bytes must be transferred before the first
data byte. The CY2213 has only three bytes of latches to store
information, and the third byte of data is reserved. Extra data is
ignored.
S data
S clk
S clk_ C
Figure 2. Device Connections
Rp
Rp
VDD
S data_ C
S data_ C
S clk_ in
S data_ in
M aster D evice
S clk_ in
S data_ in
Slave Device
Figure 3. Serial Interface Specifications
Sclk
Sdata
Start (S)
valid data
Acknowledge
Stop (P)
Document Number: 38-07263 Rev. *H
Page 4 of 16
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