CY7C1041D-10ZSXI View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY7C1041D-10ZSXI Datasheet PDF : 9 Pages
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Switching Waveforms (continued)
Read Cycle No. 2 (OE Controlled) [15,16]
CY7C1041D
ADDRESS
CE
OE
BHE, BLE
tACE
tDOE
tLZOE
tDBE
tLZBE
DATA OUT
VCC
SUPPLY
CURRENT
HIGH IMPEDANCE
tLZCE
tPU
50%
Write Cycle No. 1 (CE Controlled)[17, 18]
ADDRESS
tRC
tHZOE
DATA VALID
tHZCE
tHZBE
HIGH
IMPEDANCE
tPD
ICC
50%
ISB
tWC
CE
WE
BHE, BLE
DATAI/O
tSA
tSCE
tAW
tHA
tPWE
tBW
tSD
tHD
Notes:
15. WE is HIGH for read cycle.
16. Address valid prior to or coincident with CE transition LOW
17. Data I/O is high impedance if OE or BHE and/or BLE= VIH.
18. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05472 Rev. *C
Page 5 of 9
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