AD5533(Rev0) View Datasheet(PDF) - Analog Devices
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AD5533 Datasheet PDF : 16 Pages
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AD5533
APPLICATION CIRCUITS
AD5533 in a Typical ATE System
The AD5533 Infinite Sample-and-Hold is ideally suited for use
in Automatic Test Equipment. Several SHAs are required to
control pin drivers, comparators, active loads, and signal timing.
Traditionally, sample-and-hold devices with droop were used in
this application. These required refreshing to prevent the volt-
age from drifting.
The AD5533 has several advantages: no refreshing is required,
there is no droop, pedestal error is eliminated, and there is no
need for extra filtering to remove glitches. Overall, a higher level
of integration is achieved in a smaller area, see Figure 18.
SHA
SHA
SHA
ACTIVE
LOAD
PARAMETRIC
MEASUREMENT SYSTEM BUS
UNIT
STORED
DATA
AND INHIBIT
PATTERN
PERIOD
GENERATION
AND
DELAY
TIMING
DRIVER
SHA
FORMATTER
SHA
COMPARE
REGISTER
SHAs
SYSTEM BUS
COMPARATOR
SHA
SHA
DUT
Figure 18. AD5533 in an ATE System
Typical Application Circuit
The AD5533 can be used to set up voltage levels on 32 channels
as shown in the circuit below. An AD780 provides the 3 V refer-
ence for the AD5533, and for the AD5541 16-bit DAC. A simple
3-wire interface is used to write to the AD5541. The DAC out-
put is buffered by an AD820. It is essential to minimize noise on
VIN and REFIN when laying out this circuit.
AVCC
AVCC DVCC VSS
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5533 is mounted should be designed so that the analog and
digital sections are separated, and confined to certain areas of
the board. If the AD5533 is in a system where multiple devices
require an AGND-to-DGND connection, the connection should
be made at one point only. The star ground point should be
established as close as possible to the device. For supplies with
multiple pins (VSS, VDD, AVCC) it is recommended to tie those pins
together. The AD5533 should have ample supply bypassing of
10 µF in parallel with 0.1 µF on each supply located as close to
the package as possible, ideally right up against the device. The
10 µF capacitors are the tantalum bead type. The 0.1 µF capacitor
should have low Effective Series Resistance (ESR) and Effective
Series Inductance (ESI), like the common ceramic types that
provide a low impedance path to ground at high frequencies, to
handle transient currents due to internal logic switching.
The power supply lines of the AD5533 should use as large a trace
as possible to provide low impedance paths and reduce the effects
of glitches on the power supply line. Fast switching signals such
as clocks should be shielded with digital ground to avoid radiat-
ing noise to other parts of the board, and should never be run
near the reference inputs. A ground line routed between the
DIN and SCLK lines will help reduce crosstalk between them (not
required on a multilayer board as there will be a separate ground
plane, but separating the lines will help). It is essential to mini-
mize noise on VIN and REFIN lines.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A microstrip
technique is by far the best, but not always possible with a double-
sided board. In this technique, the component side of the board
is dedicated to ground plane while signal traces are placed on
the solder side.
CS
DIN
SCLK
VDD
AD5541* AD820
REF
VIN
AD5533*
OFFS_IN
OFFS_OUT
REFIN
VOUT 0–31
AD780*
VOUT
SCLK DIN SYNC
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 19. Typical Application Circuit
REV. 0
–15–
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