CY7C1328F View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY7C1328F Datasheet PDF : 17 Pages
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CY7C1328F
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883,Method 3015)
Latch -up Current..................................................... >200 mA
Storage Temperature .................................... –65°C to +150°
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage on VDD Relative to GND........ –0.5V to +4.6V
DC Voltage Applied to Outputs
in Three-State ..................................... –0.5V to VDDQ + 0.5V
DC Input Voltage....................................–0.5V to VDD + 0.5V
Current into Outputs (LOW) .........................................20 mA
Operating Range
Ambient
Range Temperature (TA)
VDD
VDDQ
Commercial 0°C to +70°C 3.3V −5%/+10% 2.5V −5%
Industrial –40°C to +85°C
to VDD
Electrical Characteristics Over the Operating Range[7, 8]
Parameter
Description
Test Conditions
Min. Max. Unit
VDD
VDDQ
VOH
VOL
VIH
VIL
IX
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage[7]
Input LOW Voltage[7]
Input Load Current except ZZ
and MODE
VDDQ = 3.3V, VDD = Min., IOH = –4.0 mA
VDDQ = 2.5V, VDD = Min., IOH = –2.0 mA
VDDQ = 3.3V, VDD = Min., IOL = 8.0 mA
VDDQ = 2.5V, VDD = Min., IOL = 2.0 mA
VDDQ = 3.3V
VDDQ = 2.5V
VDDQ = 3.3V
VDDQ = 2.5V
GND ≤ VI ≤ VDDQ
3.135 3.6
V
2.375 VDD
V
2.4
V
2.0
V
0.4
V
0.4
V
2.0 VDD + 0.3V V
1.7 VDD + 0.3V V
–0.3
0.8
V
–0.3
0.7
V
–5
5
µA
Input Current of MODE
Input = VSS
–30
µA
Input = VDD
5
µA
Input Current of ZZ
Input = VSS
–5
µA
Input = VDD
30
µA
IOZ
Output Leakage Current
GND ≤ VI ≤ VDDQ, Output Disabled
–5
5
µA
IDD
VDD Operating Supply Current VDD = Max., IOUT = 0 mA,
4-ns cycle, 250 MHz
f = fMAX = 1/tCYC
4.4-ns cycle, 225 MHz
325 mA
290 mA
5-ns cycle, 200 MHz
265 mA
6-ns cycle, 166 MHz
240 mA
7.5-ns cycle, 133 MHz
225 mA
10-ns cycle, 100 MHz
205 mA
ISB1
Automatic CE
Power-down
Current—TTL Inputs
VDD = Max., Device Deselected, 4-ns cycle, 250 MHz
VIN ≥ VIH or VIN ≤ VIL, f = fMAX = 4.4-ns cycle, 225 MHz
1/tCYC
5-ns cycle, 200 MHz
120 mA
115 mA
110 mA
6-ns cycle, 166 MHz
100 mA
7.5-ns cycle, 133 MHz
90
mA
10-ns cycle, 100 MHz
80
mA
Shaded areas contain advance information.
Notes:
7. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC)> –2V (Pulse width less than tCYC/2).
8. TPower-up: Assumes a linear ramp from 0v to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.
Document #: 38-05220 Rev. *A
Page 8 of 17
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