CY7C1351G(2012) View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

CY7C1351G
(Rev.:2012)

4-Mbit (128 K × 36) Flow-Through SRAM with NoBL™ Architecture

Cypress Semiconductor 

CY7C1351G

Logic Block Diagram

A0, A1, A

MODE

CLK

C

CE

CEN

ADDRESS

REGISTER

A1

A0

D1

D0

ADV/LD

C

WRITE ADDRESS

REGISTER

Q1 A1'

Q0 A0'

BURST

LOGIC

ADV/LD

BWA

BWB

BWC

BWD

WE

WRITE REGISTRY

AND DATA COHERENCY

CONTROL LOGIC

S

E

N

MEMORY

S

WRITE

ARRAY

E

DRIVERS

A

M

P

S

OE

CE1

READ LOGIC

CE2

CE3

SLEEP

ZZ

Control

INPUT E

REGISTER

O

U

T

D

P

A

U

T

T

A

B

S

U

T

F

E

F

E

E

R

R

I

S

N

E

G

DQs

DQPA

DQPB

DQPC

DQPD

Document Number: 38-05513 Rev. *K

Page 2 of 20

Share Link: