CY7C1352G(2004) View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY7C1352G Datasheet PDF : 13 Pages
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PRELIMINARY
CY7C1352G
Electrical Characteristics Over the Operating Range [9, 10] (continued)
Parameter
Description
ISB3
Automatic CE
Power-down
Current—CMOS Inputs
ISB4
Automatic CE
Power-down
Current—TTL Inputs
Test Conditions
VDD = Max, Device Deselected, 4-ns cycle, 250 MHz
or VIN ≤ 0.3V or VIN > VDDQ – 5-ns cycle, 200 MHz
0.3V
f = fMAX = 1/tCYC
6-ns cycle, 166 MHz
7.5-ns cycle, 133
MHz
VDD = Max, Device Deselected, All speeds
VIN ≥ VIH or VIN ≤ VIL, f = 0
Min.
Max. Unit
105
mA
95
mA
85
mA
75
mA
45
mA
Thermal Resistance[11]
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
TQFP Package
Test conditions follow standard test methods and
procedures for measuring thermal impedance, per
EIA / JESD51.
TBD
TBD
Unit
°C/W
°C/W
Capacitance[11]
CIN
CCLK
CI/O
Parameter
Description
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VDD = 3.3V,
VDDQ = 3.3V
Max.
5
5
5
Unit
pF
pF
pF
AC Test Loads and Waveforms
3.3V I/O Test Load
OUTPUT
Z0 = 50Ω
3.3V
OUTPUT
RL = 50Ω
5 pF
VT = 1.5V
(a)
2.5V I/O Test Load
INCLUDING
JIG AND
SCOPE
OUTPUT
2.5V
Z0 = 50Ω
OUTPUT
RL = 50Ω
5 pF
VT = 1.25V
(a)
INCLUDING
JIG AND
SCOPE
R = 317Ω
R = 351Ω
(b)
R = 1667Ω
R =1538Ω
(b)
VDDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1 ns
1ns
90%
10%
≤ 1 ns
(c)
VDDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1 ns
90%
10%
≤ 1 ns
(c)
Note:
11. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05514 Rev. *A
Page 8 of 13
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