CY7C1353B View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY7C1353B Datasheet PDF : 15 Pages
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PRELIMINARY
CY7C1353B
Cycle Description Truth Table[1, 2, 3, 4, 5, 6]
Operation
Address
ADV/
used
CE CEN LD
WE BWSx CLK
Comments
Deselected
External
1
0
L
X
X
L-H
I/Os three-state following next rec-
ognized clock.
Suspend
-
X
1
X
X
X
L-H
Clock Ignored, all operations sus-
pended.
Begin Read
External
0
0
0
1
X L-H
Address Latched.
Begin Write
External
0
0
0
0
Valid L-H
Address Latched, data presented
two valid clocks later.
Burst READ
Operation
Internal
X
0
1
X
X
L-H
Burst Read Operation. Previous
access was a Read operation. Ad-
dresses incremented internally in
conjunction with the state of Mode.
Burst WRITE
Operation
Internal
X
0
1
X
Valid L-H
Burst Write Operation. Previous
access was a Write operation. Ad-
dresses incremented internally in
conjunction with the state of Mode.
Bytes written are determined by
BWS[1:0].
Interleaved Burst Sequence
First
Address
Ax+1, Ax
00
01
10
11
Second
Address
Ax+1, Ax
01
00
11
10
Third
Address
Ax+1, Ax
10
11
00
01
Fourth
Address
Ax+1, Ax
11
10
01
00
Linear Burst Sequence
First
Address
Ax+1, Ax
00
01
10
11
Second
Address
Ax+1, Ax
01
10
11
00
Third
Address
Ax+1, Ax
10
11
00
01
Fourth
Address
Ax+1, Ax
11
00
01
10
Write Cycle Description[1, 2]
Read
Function
WE
BWS1
BWS0
1
X
X
Write - No bytes written
0
1
1
Write Byte 0 - (DQ[7:0] and DP0)
Write Byte 1 - (DQ[15:8] and DP1)
Write All Bytes
0
1
0
0
0
1
0
0
0
Notes:
1. X = “Don't Care,” 1 = Logic HIGH, 0 = Logic LOW, CE stands for ALL Chip Enables active. BWSx = 0 signifies at least one Byte Write Select is active, BWSx
= Valid signifies that the desired byte write selects are asserted, see Write Cycle Description table for details.
2. Write is defined by WE and BWS[1:0]. See Write Cycle Description table for details.
3. The DQ and DP pins are controlled by the current cycle and the OE signal.
4. CEN=1 inserts wait states.
5. Device will power-up deselected and the I/Os in a three-state condition, regardless of OE.
6. OE assumed LOW.
Document #: 38-05266 Rev. **
Page 6 of 15
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