CY8C20434-12LKXIT(2007) View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY8C20434-12LKXIT Datasheet PDF : 34 Pages
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CY8C20534, CY8C20434
CY8C20334, CY8C20234
Pinouts
This section describes, lists, and illustrates the CY8C20234, CY8C20334, CY8C20434, and CY8C20534 PSoC device pins and
pinout configurations.
The CY8C20x34 PSoC device is available in a variety of packages that are listed and shown in the following tables. Every port pin
(labeled with a “P”) is capable of Digital IO and connection to the common analog bus. However, Vss, Vdd, and XRES are not capa-
ble of Digital IO.
16-Pin Part Pinout
Figure 4. CY8C20234 16-Pin PSoC Device
AI, P2[5]
AI, P2[1]
AI, I2C SCL, SPI SS, P1[7]
AI, I2C SDA, SPI MISO, P1[5]
1
12
2 QFN 11
3 (Top View)10
4
9
P0[4], AI
XRES
P1[4], AI, EXTCLK
P1[2], AI
Table 1. 16-Pin Part Pinout (QFN[2])
Type
Pin No.
Digital Analog
Name
Description
1
IO
I
P2[5]
2
IO
I
3
IOH
I
4
IOH
I
P2[1]
P1[7]
P1[5]
I2C SCL, SPI SS.
I2C SDA, SPI MISO.
5
IOH
I
6
IOH
I
P1[3]
P1[1]
SPI CLK.
CLK[1], I2C SCL, SPI MOSI.
7
Power
8
IOH
I
Vss
P1[0]
Ground connection.
DATA[1], I2C SDA.
9
IOH
I
P1[2]
10
IOH
I
P1[4] Optional external clock input (EXTCLK).
11
Input
XRES Active high external reset with internal pull down.
12
IO
I
P0[4]
13
Power
Vdd
Supply voltage.
14
IO
I
P0[7]
15
IO
I
P0[3] Integrating input.
16
IO
I
P0[1]
A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive
Notes
1. These are the ISSP pins, that are not High Z at POR (Power On Reset). See the PSoC Mixed Signal Array Technical Reference Manual for details.
2. The center pad on the QFN package is connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it is electrically
floated and not connected to any other signal.
Document Number: 001-05356 Rev. *D
Page 7 of 34
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