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MT48LC128M4A2 View Datasheet(PDF) - Micron Technology

Part Name
Description
Manufacturer
MT48LC128M4A2
Micron
Micron Technology Micron
MT48LC128M4A2 Datasheet PDF : 68 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
512Mb: x4, x8, x16 SDRAM
Features
Synchronous DRAM
MT48LC128M4A2 – 32 Meg x 4 x 4 banks
MT48LC64M8A2 – 16 Meg x 8 x 4 banks
MT48LC32M16A2 – 8 Meg x 16 x 4 banks
For the latest data sheet, refer to Micron’s Web site
Features
• PC100- and PC133-compliant
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal pipelined operation; column address can be
changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto precharge,
and auto refresh modes
• Self refresh mode
• 64ms, 8,192-cycle refresh
• LVTTL-compatible inputs and outputs
• Single +3.3V ±0.3V power supply
Table 1: Address Table
Parameter 32 Meg x 4 32 Meg x 8 32 Meg x 16
Configuration 32 Meg x 4 16 Meg x 8
x 4 banks x 4 banks
Refresh count
8K
8K
Row
addressing
8K (A0–A12) 8K (A0–A12)
Bank
addressing
4 (BA0, BA1) 4 (BA0, BA1)
Column
addressing
4K (A0–A9, 2K (A0–A9,
A11, A12)
A11)
8 Meg x 16
x 4 banks
8K
8K (A0–A12)
4 (BA0, BA1)
1K (A0–A9)
Table 2: Key Timing Parameters
Speed
Grade
-7E
-75
-7E
-75
Access Time
Clock
Frequency CL = 2 CL = 3
143 MHz
133 MHz
133 MHz
100 MHz
5.4ns
6ns
5.4ns
5.4ns
Setup
Time
1.5ns
1.5ns
1.5ns
1.5ns
Part Number Example:
MT48LC32M16A2P-75:C
Hold
Time
0.8ns
0.8ns
0.8ns
0.8ns
Options
• Configurations
128 Meg x 4 (32 Meg x 4 x 4 banks)
64 Meg x 8 (16 Meg x 8 x 4 banks)
32 Meg x 16 (8 Meg x 16 x 4 banks)
• WRITE recovery (tWR)
tWR = “2 CLK”1
• Plastic package – OCPL2
54-pin TSOP II (400 mil)
54-pin TSOP II (400 mil) Pb-free
• Timing (cycle time)
7.5ns @ CL = 2 (PC133)
7.5ns@ CL = 3 (PC133)
• Self refresh
Standard
Low power
• Operating temperature range
Commercial (0oC to +70oC)
Industrial (–40oC +85oC)
• Revision
Marking
128M4
64M8
32M16
A2
TG
P
-7E4
-75
None
L3
None
IT
:C
Notes: 1. Refer to Micron technical note: TN-48-05.
2. Off-center parting line.
3. Contact factory for availability.
4. Available on x4 and x8 only.
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAMfront.fm - Rev. L 10/07 EN
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.

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