DAC1627D1G25 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

DAC1627D1G25

Dual 16-bit DAC, LVDS interface, up to 1.25 Gsps, x2, x4 and x8 interpolating

NXP Semiconductors. 

NXP Semiconductors

DAC1627D1G25

Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating

2. Features and benefits

„ Dual 16-bit resolution

„ Synchronization of multiple DAC

devices

„ 1.25 Gsps maximum update rate

„ 3 or 4 wires mode SPI interface

„ Selectable ×2, ×4 and ×8 interpolation „ Differential scalable output current from

filters

6.95 mA to 31.8 mA

„ Very low noise capacitor-free integrated „ External analog offset control

Phase-Locked Loop (PLL)

(10-bit auxiliary DACs)

„ Embedded Numerically Controlled

„ High resolution internal digital gain and

Oscillator (NCO) with 40-bit

offset control to support high

programmable frequency

performance IQ-modulator image

rejection

„ Embedded complex modulator

„ Internal phase correction

„ 1.8 V and 3.3 V power supplies

„ Inverse (sin x) / x function

„ LVDS DDR compatible input interface „ Power-down mode and Sleep mode;

with on-chip 100 Ω terminations

5-bit NCO low power mode

„ LVDS DDR input clock up to 312.5 MHz „ On-chip 1.25 V reference

„ LVDS or LVPECL compatible DAC clock „ Industrial temperature range −40 °C to

+85 °C

„ Interleaved or folded I and Q data input „ 72 pins small form factor HVQFN

mode

package

3. Applications

„ Wireless infrastructure: MG_GSM, LTE, WiMAX, GSM, CDMA, WCDMA, TD-SCDMA

„ Communication: LMDS/MMDS, point-to-point

„ Direct Digital Synthesis (DDS)

„ Broadband wireless systems

„ Digital radio links

„ Instrumentation

„ Automated Test Equipment (ATE)

4. Ordering information

Table 1. Ordering information

Type number

Package

Name

Description

DAC1627D1G25 HVQFN72 plastic thermal enhanced very thin quad flat package; no leads;

72 terminals; body 10 × 10 × 0.85 mm

Version

SOT813-3

DAC1627D1G25

Objective data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 29 April 2011

© NXP B.V. 2011. All rights reserved.

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