NT7501
3. Set Page Address
Specifies the page address where to load display RAM data in the page address register. Any RAM data bit can be
accessed when its page address and column address are specified. The display remains unchanged even when the page
address is changed. Page address 8 is the display RAM area dedicated to the indicator and only D0 is valid for data
change.
A0 E R W D7 D6 D5 D4 D3 D2 D1 D0
RD WR
0 1 0 1 0 1 1 A3 A2 A1 A0
A3 A2 A1 A0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
Page address
0
1
2
3
4
5
6
7
8
4. Set Column Address
Specifies the column address of the display RAM. Divide the column address into 4 higher bits and 4 lower bits. Set each
of them in succession. When the microprocessor repeatedly access the display RAM, the column address counter is
incremented during each access until address 132 is accessed. The page address is not changed during this time.
Higher bits
Lower bits
A0 E R W D7 D6 D5 D4 D3 D2 D1 D0
RD WR
0 1 0 0 0 0 1 A7 A6 A5 A4
0 1 0 0 0 0 0 A3 A2 A1 A0
A7 A6 A5 A4 A3 A2 A1 A0 Column address
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
:
:
1
0
0
0
0
0
1
1
131
19