DS21T09 View Datasheet(PDF) - Dallas Semiconductor -> Maxim Integrated
Part Name
Description
Manufacturer
DS21T09 Datasheet PDF : 10 Pages
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DS21T09
DETAILED PIN DESCRIPTION Table 1
PIN
1
2-6,
10-13,
16-19,
24-27
7, 8, 21
9
14
15
20
22
23
28
SYMBOL
PDI
R1…R13
R15…R18
HS-GND
PDO
TPWR
VREF
PDE
TCS
R14
GND
FCN
I
T
P
O
P
O
I
I
T
P
DESCRIPTION
Power-Down Internal. For Bus Ground Sensing Circuit, connect to pin
22 of internal SCSI connector; see Figure 4.
Signal Termination. 110Ω termination. Connect to SCSI bus signal
lines. For Bus Current Sensing Circuit connect to data, parity, and
control lines, except SCSI-RST line; see Figure 6.
Heat Sink Ground. Internally connected to the mounting pad. Should
be either grounded or electronically isolated from other circuitry.
Power-Down Output. Connect to DS21T07 for Wide SCSI
applications; see Figure 8.
Termination Power. Connect to the SCSI TERMPWR line. Bypass
with a 2.2 µF capacitor; see Figures 4 and 6.
Reference Voltage. 2.85-volt reference; must be decoupled with a 4.7
µF capacitor; see Figures 4 and 6.
Power-Down External. For Bus Ground Sensing Circuit, connect to pin
36 of external SCSI connector; see Figure 4.
Termination Current Sense. Used to sense current on the SCSI bus.
For Bus Current Sensing Circuit, connect to SCSI signal line –RST; see
Figure 6.
Signal Termination. 110Ω termination. Connect to SCSI bus signal
lines. For Bus Current Sensing Circuit connect to SCSI controller chip;
see Figure 6.
Ground. Signal ground; 0.0 volts.
ACTIVE TERMINATION
The voltage regulator circuitry (bandgap reference and class AB power amplifier) produces a precise,
laser-trimmed 2.85-volt level and is capable of sourcing 25 mA into each of the terminating resistors
when the signal line is low (active). When the external driver for a given signal line turns off, the active
terminator will pull that signal line to 2.85 volts (quiescent state). When used with an active negation
driver, the power amp can sink 22 mA per line while keeping the voltage reference in regulation; the
terminating resistors maintain their 110Ω=value over the entire voltage range and Vref will move less than
60 mv. To maintain the specified regulation, a 4.7 µF capacitor is required between the VREF pin and
ground. A high frequency capacitor (0.1 µF ceramic recommended) can also be placed on the Vref pin in
applications that use fast rise/fall time drivers. The power down capacitance on terminating resistors R1-
R13 and R15-R18 is <3 pF; R14 is slightly higher due to the bus current sensing circuitry.
The DS21T09 can be removed from the SCSI bus by using either of two automatic methods: Bus Ground
Sensing or Bus Current Sensing.
As with all analog circuitry, the TERMPWR lines should be bypassed locally. A 2.2 µF capacitor is
recommended between TPWR and ground. It should be placed as close as possible to the DS21T09. The
DS21T09 should be placed as close as possible to the connector to minimize signal and power trace
length, thereby resulting in less input capacitance and reflections which can degrade the bus signals.
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